<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/sound/soc/sof/intel/mtl.c, branch jd/bump-compilers</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/sound/soc/sof/intel/mtl.c?h=jd%2Fbump-compilers</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/sound/soc/sof/intel/mtl.c?h=jd%2Fbump-compilers'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2024-05-07T01:37:51Z</updated>
<entry>
<title>ALSA/ASoC: Intel: clarify Copyright information</title>
<updated>2024-05-07T01:37:51Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2024-05-07T01:37:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ba04ff20062c14bfb3119aae5eec1a919ddd54d3'/>
<id>urn:sha1:ba04ff20062c14bfb3119aae5eec1a919ddd54d3</id>
<content type='text'>
Merge series from Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;:

This patchset does not change any functionality. It only clarifies the
Copyright information in ASoC/HDAudio contributions, where an "All
rights reserved" notice was mistakenly added in a number of files over
the years, likely due to copy/paste. The Intel template never included
this statement.
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: clarify Copyright information</title>
<updated>2024-05-06T14:59:35Z</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2024-05-03T14:03:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=293ad28116e2c3e4d3eb28bd0378558edc897f55'/>
<id>urn:sha1:293ad28116e2c3e4d3eb28bd0378558edc897f55</id>
<content type='text'>
For some reason a number of files included the "All rights reserved"
statement. Good old copy-paste made sure this mistake proliferated.

Remove the "All rights reserved" in all Intel-copyright to align with
internal guidance.

Reviewed-by: Cezary Rojewski &lt;cezary.rojewski@intel.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20240503140359.259762-2-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: remove circular dependency on hda_sdw_process_wakeen()</title>
<updated>2024-05-05T14:45:47Z</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2024-05-03T13:52:20Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=3b7bd0c139849e95981961525b7f6dd20097a563'/>
<id>urn:sha1:3b7bd0c139849e95981961525b7f6dd20097a563</id>
<content type='text'>
hda_sdw_process_wakeen() is used in hda-loader.c, but defined in
hda.c. This code split will create a circular dependency when hda.c is
moved to a different module. Rather than an invasive code change, this
patch follows the model used for sdw_check_wakeen_irq() with an
abstraction. For now all abstractions point to the same common
routine, which is arguably not great, but this also provides us with a
future-proof way of addressing platform-specific wake processing.

Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20240503135221.229202-7-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: start splitting top-level from common parts</title>
<updated>2024-05-05T14:45:45Z</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2024-05-03T13:52:17Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=456644cbeab14394fff1308ffdaf87d4e0e6fb01'/>
<id>urn:sha1:456644cbeab14394fff1308ffdaf87d4e0e6fb01</id>
<content type='text'>
The existing code relies on the 'HDA_COMMON' module and namespace. We
need to start splitting top-level parts from the low-level ones,
otherwise we will not be able to reuse the low-level parts DMA support
for SoundWire/BPT.

In the end the dependencies will be:

         +----------------------------------------------+
         |                                              |
         |                                              v
sof-pci-intel-xxx --&gt; sof-intel-hda ------------&gt; sof-hda-common
                          |                             ^
                          |                             |
                          +-&gt; soundwire_intel --&gt; sof_hda_sdw_bpt

This patch adds the initial split between the sof-pci-intel-xxx
modules and the common parts, in a follow-up patch we will further
split the HDA_COMMON parts

Since the PCI modules are not all independent, i.e. the CNL parts are
also used in JSL and TGL, additional Kconfig and namespace modules
were added.

Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20240503135221.229202-4-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: mtl: Add fw_regs area to debugfs map</title>
<updated>2024-04-09T12:24:20Z</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2024-04-09T11:33:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=d33a369ddad522eff40c6b9687db1488e19729d6'/>
<id>urn:sha1:d33a369ddad522eff40c6b9687db1488e19729d6</id>
<content type='text'>
Expose the firmware registers via debugfs. it can be of great help while
debugging complex issues.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://msgid.link/r/20240409113349.21623-3-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: mtl/lnl: Improve firmware boot state</title>
<updated>2024-04-03T15:28:31Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2024-04-03T15:28:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=f79b1758b86c4865316d3c6fa1fed93588acdd5c'/>
<id>urn:sha1:f79b1758b86c4865316d3c6fa1fed93588acdd5c</id>
<content type='text'>
Merge series from Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;:

This series improves the firmware/boot state handling which will allow
failed IMR boot recovery and human readable boot failure decoding.

Additionally a new debugfs file is added to force a purge/clean boot
of the DSP for developers.
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: mtl: Correct the mtl_dsp_dump output</title>
<updated>2024-04-03T11:04:28Z</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2024-04-03T10:52:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=40bdf121a3ed91281196068e50789888e4b1d2d2'/>
<id>urn:sha1:40bdf121a3ed91281196068e50789888e4b1d2d2</id>
<content type='text'>
The ROM/firmware state handling has changed between CAVS and ACE
architecture:
CAVS: ROM and firmware uses the SRAM window for the state and status/error
code reporting

ACE: ROM code is using two registers to report the state and error while
the firmware is using the SRAM window to report states and status/error
codes.

Use the generic hda_dsp_get_state() to decode ROM state and error codes and
print out the firmware state and status/error code only if the SRAM
window is accessible - the firmware is booted and the Status readout is
not 0xffffffff.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Liam Girdwood &lt;liam.r.girdwood@intel.com&gt;
Link: https://msgid.link/r/20240403105210.17949-8-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: mtl: Implement firmware boot state check</title>
<updated>2024-04-03T11:04:26Z</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2024-04-03T10:52:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=6b1c1c47e76f0161bda2b1ac2e86a219fe70244f'/>
<id>urn:sha1:6b1c1c47e76f0161bda2b1ac2e86a219fe70244f</id>
<content type='text'>
With the corrected rom_status_reg values we can now add a check for target
boot status for firmware booting.
With the check now we can identify failed firmware boots (IMR boots) and
we can use the fallback to purge boot the DSP.

Fixes: 064520e8aeaa ("ASoC: SOF: Intel: Add support for MeteorLake (MTL)")
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Liam Girdwood &lt;liam.r.girdwood@intel.com&gt;
Link: https://msgid.link/r/20240403105210.17949-6-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: mtl: Disable interrupts when firmware boot failed</title>
<updated>2024-04-03T11:04:25Z</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2024-04-03T10:52:07Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=26187f44aabdf3df7609b7c78724a059c230a2ad'/>
<id>urn:sha1:26187f44aabdf3df7609b7c78724a059c230a2ad</id>
<content type='text'>
In case of error during the firmware boot we need to disable the interrupts
which were enabled as part of the boot sequence.

Fixes: 064520e8aeaa ("ASoC: SOF: Intel: Add support for MeteorLake (MTL)")
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Liam Girdwood &lt;liam.r.girdwood@intel.com&gt;
Link: https://msgid.link/r/20240403105210.17949-5-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: mtl: Correct rom_status_reg</title>
<updated>2024-04-03T11:04:23Z</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2024-04-03T10:52:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=1f1b820dc3c65b6883da3130ba3b8624dcbf87db'/>
<id>urn:sha1:1f1b820dc3c65b6883da3130ba3b8624dcbf87db</id>
<content type='text'>
ACE1 architecture changed the place where the ROM updates the status code
from the shared SRAM window to HFFLGP1QW0 register for the status and
HFFLGP1QW0 + 4 for the error code.

The rom_status_reg is not used on MTL because it was wrongly assigned based
on older platform convention (SRAM window) and it was giving inconsistent
readings.

Fixes: 064520e8aeaa ("ASoC: SOF: Intel: Add support for MeteorLake (MTL)")
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Liam Girdwood &lt;liam.r.girdwood@intel.com&gt;
Link: https://msgid.link/r/20240403105210.17949-3-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
</feed>
