wireguard-linux/tools/perf/arch/arm, branch update-toolchain

perf arm-spe: Support multiple Arm SPE PMUs

2024-07-12T16:38:40Z

A platform can have more than one Arm SPE PMU. For example, a system with multiple clusters may have each cluster enabled with its own Arm SPE instance. In such case, the PMU devices will be named 'arm_spe_0', 'arm_spe_1', and so on. Currently, the tool only supports 'arm_spe_0'. This commit extends support to multiple Arm SPE PMUs by detecting the substring 'arm_spe_'. Signed-off-by: Leo Yan Reviewed-by: James Clark Cc: Suzuki K Poulose Cc: Will Deacon Cc: Mike Leach Cc: Kajol Jain Cc: John Garry Cc: linux-arm-kernel@lists.infradead.org Cc: coresight@lists.linaro.org Link: https://lore.kernel.org/r/20240706152035.86983-2-leo.yan@arm.com Signed-off-by: Namhyung Kim

perf util: Make util its own library

2024-06-26T18:07:42Z

Make the util directory into its own library. This is done to avoid compiling code twice, once for the perf tool and once for the perf python module. For convenience: arch/common.c scripts/perl/Perf-Trace-Util/Context.c scripts/python/Perf-Trace-Util/Context.c are made part of this library. Signed-off-by: Ian Rogers Reviewed-by: James Clark Cc: Suzuki K Poulose Cc: Kees Cook Cc: Palmer Dabbelt Cc: Albert Ou Cc: Nick Terrell Cc: Gary Guo Cc: Alex Gaynor Cc: Boqun Feng Cc: Wedson Almeida Filho Cc: Ze Gao Cc: Alice Ryhl Cc: Andrei Vagin Cc: Yicong Yang Cc: Jonathan Cameron Cc: Guo Ren Cc: Miguel Ojeda Cc: Will Deacon Cc: Mike Leach Cc: Leo Yan Cc: Oliver Upton Cc: John Garry Cc: Benno Lossin Cc: Björn Roy Baron Cc: Andreas Hindborg Cc: Paul Walmsley Signed-off-by: Namhyung Kim Link: https://lore.kernel.org/r/20240625214117.953777-7-irogers@google.com

perf test: Make tests its own library

2024-06-26T18:07:11Z

Make the tests code its own library. This is done to avoid compiling code twice, once for the perf tool and once for the perf python module. Signed-off-by: Ian Rogers Reviewed-by: James Clark Cc: Suzuki K Poulose Cc: Kees Cook Cc: Palmer Dabbelt Cc: Albert Ou Cc: Nick Terrell Cc: Gary Guo Cc: Alex Gaynor Cc: Boqun Feng Cc: Wedson Almeida Filho Cc: Ze Gao Cc: Alice Ryhl Cc: Andrei Vagin Cc: Yicong Yang Cc: Jonathan Cameron Cc: Guo Ren Cc: Miguel Ojeda Cc: Will Deacon Cc: Mike Leach Cc: Leo Yan Cc: Oliver Upton Cc: John Garry Cc: Benno Lossin Cc: Björn Roy Baron Cc: Andreas Hindborg Cc: Paul Walmsley Signed-off-by: Namhyung Kim Link: https://lore.kernel.org/r/20240625214117.953777-5-irogers@google.com

perf arm: Workaround ARM PMUs cpu maps having offline cpus

2024-06-21T22:50:29Z

When PMUs have a cpu map in the 'cpus' or 'cpumask' file, perf will try to open events on those CPUs. ARM doesn't remove offline CPUs meaning taking a CPU offline will cause perf commands to fail unless a CPU map is passed on the command line. More context in: https://lore.kernel.org/lkml/20240603092812.46616-1-yangyicong@huawei.com/ Reported-by: Yicong Yang Closes: https://lore.kernel.org/lkml/20240603092812.46616-2-yangyicong@huawei.com/ Signed-off-by: Ian Rogers Tested-by: Yicong Yang Tested-by: Leo Yan Cc: James Clark Cc: Suzuki K Poulose Cc: Will Deacon Cc: Mike Leach Cc: Leo Yan Cc: linux-arm-kernel@lists.infradead.org Cc: coresight@lists.linaro.org Cc: John Garry Signed-off-by: Namhyung Kim Link: https://lore.kernel.org/r/20240607065343.695369-1-irogers@google.com

perf cs-etm: Improve version detection and error reporting

2024-05-02T14:34:41Z

When the config validation functions are warning about ETMv3, they do it based on "not ETMv4". If the drivers aren't all loaded or the hardware doesn't support Coresight it will appear as "not ETMv4" and then Perf will print the error message "... not supported in ETMv3 ..." which is wrong and confusing. cs_etm_is_etmv4() is also misnamed because it also returns true for ETE because ETE has a superset of the ETMv4 metadata files. Although this was always done in the correct order so it wasn't a bug. Improve all this by making a single get version function which also handles not present as a separate case. Change the ETMv3 error message to only print when ETMv3 is detected, and add a new error message for the not present case. Reviewed-by: Ian Rogers Reviewed-by: Leo Yan Signed-off-by: James Clark Cc: Adrian Hunter Cc: Alexander Shishkin Cc: Ingo Molnar Cc: Jiri Olsa Cc: John Garry Cc: Kan Liang Cc: Mark Rutland Cc: Mike Leach Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Suzuki Poulouse Cc: Will Deacon Link: https://lore.kernel.org/r/20240501135753.508022-4-james.clark@arm.com Signed-off-by: Arnaldo Carvalho de Melo

perf cs-etm: Remove repeated fetches of the ETM PMU

2024-05-02T14:33:46Z

Most functions already have cs_etm_pmu, so it's a bit neater to pass it through rather than itr only to convert it again. Signed-off-by: James Clark Cc: Adrian Hunter Cc: Alexander Shishkin Cc: Ian Rogers Cc: Ingo Molnar Cc: Jiri Olsa Cc: John Garry Cc: Kan Liang Cc: Leo Yan Cc: Mark Rutland Cc: Mike Leach Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Suzuki Poulouse Cc: Will Deacon Link: https://lore.kernel.org/r/20240501135753.508022-3-james.clark@arm.com Signed-off-by: Arnaldo Carvalho de Melo

perf cs-etm: Use struct perf_cpu as much as possible

2024-05-02T14:26:59Z

The perf_cpu struct makes some iterators simpler and avoids some mistakes with interchanging CPU IDs with indexes etc. At the moment in this file the conversion to an integer is done somewhere in the middle of the call tree. Change it to delay the conversion to an int until the leaf functions. Some of the usage patterns are duplicated, so instead of changing them all, make cs_etm_get_ro() more reusable and use that everywhere. cs_etm_get_ro() didn't return an error before, but return one now so that it can also be used where an error is needed. Continue to ignore the error where it was already ignored. Use cs_etm_pmu_path_exists() instead of cs_etm_get_ro() in cs_etm_is_etmv4() because cs_etm_get_ro() prints a warning, but path exists is sufficient for this use case. Signed-off-by: James Clark Cc: Adrian Hunter Cc: Alexander Shishkin Cc: Ian Rogers Cc: Ingo Molnar Cc: Jiri Olsa Cc: John Garry Cc: Kan Liang Cc: Leo Yan Cc: Mark Rutland Cc: Mike Leach Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Suzuki Poulouse Cc: Will Deacon Link: https://lore.kernel.org/r/20240501135753.508022-2-james.clark@arm.com Signed-off-by: Arnaldo Carvalho de Melo

perf arm-spe/cs-etm: Directly iterate CPU maps

2024-03-21T13:41:28Z

Rather than iterate all CPUs and see if they are in CPU maps, directly iterate the CPU map. Similarly make use of the intersect function taking care for when "any" CPU is specified. Switch perf_cpu_map__has_any_cpu_or_is_empty() to more appropriate alternatives. Reviewed-by: James Clark Signed-off-by: Ian Rogers Acked-by: Namhyung Kim Cc: Adrian Hunter Cc: Alexander Shishkin Cc: Alexandre Ghiti Cc: Andrew Jones Cc: André Almeida Cc: Athira Rajeev Cc: Atish Patra Cc: Changbin Du Cc: Darren Hart Cc: Davidlohr Bueso Cc: Huacai Chen Cc: Ingo Molnar Cc: Jiri Olsa Cc: John Garry Cc: K Prateek Nayak Cc: Kajol Jain Cc: Kan Liang Cc: Leo Yan Cc: Mark Rutland Cc: Mike Leach Cc: Nick Desaulniers Cc: Paolo Bonzini Cc: Paran Lee Cc: Peter Zijlstra Cc: Ravi Bangoria Cc: Sandipan Das Cc: Sean Christopherson Cc: Steinar H. Gunderson Cc: Suzuki Poulouse Cc: Thomas Gleixner Cc: Will Deacon Cc: Yang Jihong Cc: Yang Li Cc: Yanteng Si Link: https://lore.kernel.org/r/20240202234057.2085863-4-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo

perf parse-regs: Introduce a weak function arch__sample_reg_masks()

2024-02-15T21:48:36Z

Every architecture can provide a register list for sampling. If an architecture doesn't support register sampling, it won't define the data structure 'sample_reg_masks'. Consequently, any code using this structure must be protected by the macro 'HAVE_PERF_REGS_SUPPORT'. This patch defines a weak function, arch__sample_reg_masks(), which will be replaced by an architecture-defined function for returning the architecture's register list. With this refactoring, the function always exists, the condition checking for 'HAVE_PERF_REGS_SUPPORT' is not needed anymore, so remove it. Signed-off-by: Leo Yan Reviewed-by: Ian Rogers Cc: James Clark Cc: Palmer Dabbelt Cc: Albert Ou Cc: Huacai Chen Cc: Guo Ren Cc: Will Deacon Cc: Mike Leach Cc: Kan Liang Cc: Ming Wang Cc: John Garry Cc: Paul Walmsley Cc: linux-csky@vger.kernel.org Cc: linux-riscv@lists.infradead.org Signed-off-by: Namhyung Kim Link: https://lore.kernel.org/r/20240214113947.240957-4-leo.yan@linux.dev

perf mem: Add mem_events into the supported perf_pmu

2024-01-24T22:03:33Z

With the mem_events, perf doesn't need to read sysfs for each PMU to find the mem-events-supported PMU. The patch also makes it possible to clean up the related __weak functions later. The patch is only to add the mem_events into the perf_pmu for all ARCHs. It will be used in the later cleanup patches. Reviewed-by: Ian Rogers Reviewed-by: Kajol Jain Tested-by: Ravi Bangoria Tested-by: Leo Yan Tested-by: Kajol Jain Suggested-by: Leo Yan Signed-off-by: Kan Liang Cc: will@kernel.org Cc: mike.leach@linaro.org Cc: renyu.zj@linux.alibaba.com Cc: yuhaixin.yhx@linux.alibaba.com Cc: tmricht@linux.ibm.com Cc: atrajeev@linux.vnet.ibm.com Cc: linux-arm-kernel@lists.infradead.org Cc: john.g.garry@oracle.com Link: https://lore.kernel.org/r/20240123185036.3461837-2-kan.liang@linux.intel.com Signed-off-by: Namhyung Kim