<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/tools/power/x86, branch jd/orphan-parallel</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/tools/power/x86?h=jd%2Forphan-parallel</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/tools/power/x86?h=jd%2Forphan-parallel'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-10-07T20:54:35Z</updated>
<entry>
<title>tools/power/x86/intel-speed-select: Update version for v5.10</title>
<updated>2020-10-07T20:54:35Z</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2020-10-06T13:26:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e529412f3211071b4787a8e7e153c8ced3c22a28'/>
<id>urn:sha1:e529412f3211071b4787a8e7e153c8ced3c22a28</id>
<content type='text'>
Update version for changes released with v5.10 kernel release.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>tools/power/x86/intel-speed-select: Fix missing base-freq core IDs</title>
<updated>2020-10-07T20:54:16Z</updated>
<author>
<name>Jonathan Doman</name>
<email>jonathan.doman@intel.com</email>
</author>
<published>2020-09-30T22:26:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=7566616fb968dcc9f11d3f6b57132d33acab4e35'/>
<id>urn:sha1:7566616fb968dcc9f11d3f6b57132d33acab4e35</id>
<content type='text'>
The reported base-freq high-priority-cpu-list was potentially omitting
some cpus, due to incorrectly using a logical core count to constrain
the size of a physical punit core ID mask. We may need to read both high
and low PBF CORE_MASK values regardless of the logical core count.

Signed-off-by: Jonathan Doman &lt;jonathan.doman@intel.com&gt;
Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
</entry>
<entry>
<title>tools/power/x86/intel-speed-select: Update version for v5.9</title>
<updated>2020-07-16T17:18:06Z</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2020-07-01T21:41:47Z</published>
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<id>urn:sha1:f65e1311e9c6c69bb886bd3333577f85d9eeddbc</id>
<content type='text'>
Update version for changes released with v5.9 kernel release.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power/x86/intel-speed-select: Add retries for mail box commands</title>
<updated>2020-07-16T17:17:55Z</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2020-07-01T21:37:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=32279be7e159df5de68f2c37e4ca96e7e4358c4d'/>
<id>urn:sha1:32279be7e159df5de68f2c37e4ca96e7e4358c4d</id>
<content type='text'>
Retry mail box command on failure. The default retry count is 3. This can
be changed by "-r|--retry" options. This helps during early bring up of
platforms.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power/x86/intel-speed-select: Add option to delay mbox commands</title>
<updated>2020-07-16T17:17:42Z</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2020-07-01T21:27:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a85a35fc1d9be7984f052926e42291219ee5ef85'/>
<id>urn:sha1:a85a35fc1d9be7984f052926e42291219ee5ef85</id>
<content type='text'>
Add option "p|--pause" to introduce delay between two mail box commands
for test purpose. This delay can be specified in milliseconds. By default
there is no delay between two mailbox commands.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power/x86/intel-speed-select: Ignore -o option processing on error</title>
<updated>2020-07-16T17:17:33Z</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2020-06-30T17:45:36Z</published>
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<id>urn:sha1:6374de848966966bad9472ed3681a069a8db5a6f</id>
<content type='text'>
When for some reason, CONFIG_TDP_GET_CORE_MASK mailbox command fails, then
don't continue online/offline operation for perf-profile set-config-level
with "-o" option.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power/x86/intel-speed-select: Change path for caching topology info</title>
<updated>2020-07-16T17:17:24Z</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2020-06-30T17:39:40Z</published>
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<id>urn:sha1:b1d12cef7c0abe60e7524c3ac2821b7a4d29fede</id>
<content type='text'>
We want to cache the topology info to a file, which is not preserved
across boot cycle. The current storage in /tmp is getting preserved.
So change the path from /tmp/isst_cpu_topology.dat to
/var/run/isst_cpu_topology.dat.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power/x86/intel-speed-select: Fix invalid core mask</title>
<updated>2020-05-22T18:18:15Z</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2020-05-19T23:28:34Z</published>
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<id>urn:sha1:873e391ff33e742189cd7da5ed4bfd941e83edd7</id>
<content type='text'>
The core mask display is wrong in some cases. This is showing more
cpus than the mask has. This is because mask is 64 bit but it used
with BIT() macro to get the presence of CPU which doesn't support
unsigned long long. Added a new macro for BIT_ULL and use that
to get the presence of a CPU.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power/x86/intel-speed-select: Increase CPU count</title>
<updated>2020-05-22T18:18:15Z</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2020-05-15T19:46:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e16ea66365e43d5e3b338ba8d406dec38c6c3d39'/>
<id>urn:sha1:e16ea66365e43d5e3b338ba8d406dec38c6c3d39</id>
<content type='text'>
Increase CPU count so that more than 64 is supported in one request.

For example:
sudo ./intel-speed-select -d --cpu 0-66 core-power assoc -clos 0
The above command stops at 63. With this change, it can support more
CPU numbers from 0-255.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power/x86/intel-speed-select: Fix json perf-profile output output</title>
<updated>2020-05-22T18:18:15Z</updated>
<author>
<name>Prarit Bhargava</name>
<email>prarit@redhat.com</email>
</author>
<published>2020-05-11T19:06:28Z</published>
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<id>urn:sha1:aa8b650b1aa2cb3cc9869795eac0ba8ffe4ea524</id>
<content type='text'>
The 'intel-speed-select -f json perf-profile get-lock-status' command
outputs the package, die, and cpu data as separate fields.

ex)

  "package-0": {
    "die-0": {
      "cpu-0": {

Commit 74062363f855 ("tools/power/x86/intel-speed-select: Avoid duplicate Package strings for json") prettied this output so that it is a single line for
some json output commands and the same should be done for other commands.

Output package, die, and cpu info in a single line when using json output.

Signed-off-by: Prarit Bhargava &lt;prarit@redhat.com&gt;
Cc: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Cc: platform-driver-x86@vger.kernel.org
Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
</content>
</entry>
</feed>
