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authorMaulik Shah <maulik.shah@oss.qualcomm.com>2025-04-29 09:32:29 +0530
committerLinus Walleij <linus.walleij@linaro.org>2025-04-29 10:27:25 +0200
commit12b8a672d2aa053064151659f49e7310674d42d3 (patch)
tree5c51c976c7977a1e1021474a76206c3c84466d7c
parentpinctrl: mediatek: common-v1: Fix error checking in mtk_eint_init() (diff)
downloadwireguard-linux-12b8a672d2aa053064151659f49e7310674d42d3.tar.xz
wireguard-linux-12b8a672d2aa053064151659f49e7310674d42d3.zip
pinctrl: qcom: Fix PINGROUP definition for sm8750
On newer SoCs intr_target_bit position is at 8 instead of 5. Fix it. Also add missing intr_wakeup_present_bit and intr_wakeup_enable_bit which enables forwarding of GPIO interrupts to parent PDC interrupt controller. Fixes: afe9803e3b82 ("pinctrl: qcom: Add sm8750 pinctrl driver") Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Link: https://lore.kernel.org/20250429-pinctrl_sm8750-v2-1-87d45dd3bd82@oss.qualcomm.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to '')
-rw-r--r--drivers/pinctrl/qcom/pinctrl-sm8750.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8750.c b/drivers/pinctrl/qcom/pinctrl-sm8750.c
index 1af11cd95fb0..b94fb4ee0ec3 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm8750.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm8750.c
@@ -46,7 +46,9 @@
.out_bit = 1, \
.intr_enable_bit = 0, \
.intr_status_bit = 0, \
- .intr_target_bit = 5, \
+ .intr_wakeup_present_bit = 6, \
+ .intr_wakeup_enable_bit = 7, \
+ .intr_target_bit = 8, \
.intr_target_kpss_val = 3, \
.intr_raw_status_bit = 4, \
.intr_polarity_bit = 1, \