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authorNĂ­colas F. R. A. Prado <nfraprado@collabora.com>2024-10-18 11:19:03 -0400
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2024-10-21 15:46:21 +0200
commit155f9e32409ac7306ec888844f4b81d2c1625340 (patch)
tree461a710ab234ef4676ea1fe8e0be9460b3b013a1
parentarm64: dts: mediatek: mt8188: Add ethernet node (diff)
downloadwireguard-linux-155f9e32409ac7306ec888844f4b81d2c1625340.tar.xz
wireguard-linux-155f9e32409ac7306ec888844f4b81d2c1625340.zip
arm64: dts: mediatek: mt8390-genio-700-evk: Enable ethernet
Enable ethernet on the Genio 700 EVK board. It has been tested to work with speeds up to 1000Mbps. [Cleaned up to pass dtbs_check, follow DTS style guidelines, and split between mt8188 and genio700 commits, and addressed further feedback from the mailing list] Signed-off-by: Jianguo Zhang <jianguo.zhang@mediatek.com> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Signed-off-by: Hsuan-Yu Lin <shane.lin@canonical.com> Signed-off-by: Pablo Sun <pablo.sun@mediatek.com> Signed-off-by: fanyi zhang <fanyi.zhang@mediatek.com> Signed-off-by: NĂ­colas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20241018-genio700-eth-v2-2-f3c73b85507b@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Diffstat (limited to '')
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts b/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts
index bb68665f0b2d..13f2e0e3fa8a 100644
--- a/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts
@@ -23,6 +23,7 @@
"mediatek,mt8188";
aliases {
+ ethernet0 = &eth;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -891,6 +892,25 @@
};
};
+&eth {
+ phy-mode ="rgmii-id";
+ phy-handle = <&ethernet_phy0>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&eth_default_pins>;
+ pinctrl-1 = <&eth_sleep_pins>;
+ mediatek,mac-wol;
+ snps,reset-gpio = <&pio 147 GPIO_ACTIVE_HIGH>;
+ snps,reset-delays-us = <0 10000 10000>;
+ status = "okay";
+};
+
+&eth_mdio {
+ ethernet_phy0: ethernet-phy@1 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x1>;
+ };
+};
+
&pmic {
interrupt-parent = <&pio>;
interrupts = <222 IRQ_TYPE_LEVEL_HIGH>;