diff options
| author |   Jernej Skrabec <jernej.skrabec@siol.net> | 2017-12-01 07:05:38 +0100 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-12-05 13:22:43 +0100 |
| commit | 165d24df78b8aae0fc59557fdd73f4c3deb240ea (patch) | |
| tree | e6787d6e14ec16e08d4e9930e543b831d15b7a97 | |
| parent | drm/sun4i: Move channel size related code in DE2 (diff) | |
| download | wireguard-linux-165d24df78b8aae0fc59557fdd73f4c3deb240ea.tar.xz wireguard-linux-165d24df78b8aae0fc59557fdd73f4c3deb240ea.zip | |
drm/sun4i: Move interlace related code in DE2
There is no point having code which sets interlace mode of mixer in
channel related function. Interlace mode will only change when CRTC
state will change, so let's move it to the block which is executed only
when primary plane state is changed.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171201060550.10392-16-jernej.skrabec@siol.net
Diffstat (limited to '')
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_mixer.c | 33 |
1 files changed, 20 insertions, 13 deletions
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 00c0cc6440e2..f35a08dc260b 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -104,6 +104,9 @@ int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer, int channel, size = SUN8I_MIXER_SIZE(width, height); if (plane->type == DRM_PLANE_TYPE_PRIMARY) { + bool interlaced = false; + u32 val; + DRM_DEBUG_DRIVER("Primary layer, updating global size W: %u H: %u\n", width, height); regmap_write(mixer->engine.regs, @@ -111,6 +114,23 @@ int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer, int channel, size); regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_OUTSIZE, size); + + if (state->crtc) + interlaced = state->crtc->state->adjusted_mode.flags + & DRM_MODE_FLAG_INTERLACE; + + if (interlaced) + val = SUN8I_MIXER_BLEND_OUTCTL_INTERLACED; + else + val = 0; + + regmap_update_bits(mixer->engine.regs, + SUN8I_MIXER_BLEND_OUTCTL, + SUN8I_MIXER_BLEND_OUTCTL_INTERLACED, + val); + + DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n", + interlaced ? "on" : "off"); } /* Set height and width */ @@ -140,22 +160,9 @@ int sun8i_mixer_update_layer_formats(struct sun8i_mixer *mixer, int channel, { struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; - bool interlaced = false; u32 val; int ret; - if (plane->state->crtc) - interlaced = plane->state->crtc->state->adjusted_mode.flags - & DRM_MODE_FLAG_INTERLACE; - - regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_OUTCTL, - SUN8I_MIXER_BLEND_OUTCTL_INTERLACED, - interlaced ? - SUN8I_MIXER_BLEND_OUTCTL_INTERLACED : 0); - - DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n", - interlaced ? "on" : "off"); - ret = sun8i_mixer_drm_format_to_layer(plane, fb->format->format, &val); if (ret) { |