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| author |   Dario Binacchi <dario.binacchi@amarulasolutions.com> | 2025-01-14 19:19:47 +0100 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2025-01-15 15:17:05 -0800 |
| commit | 223d32eb1001dabdb3fc278683361f61cd78b0e2 (patch) | |
| tree | 69cab34ad1c75bb3786cd8b4188a833b0c46e49c | |
| parent | dt-bindings: clock: convert stm32 rcc bindings to json-schema (diff) | |
| download | wireguard-linux-223d32eb1001dabdb3fc278683361f61cd78b0e2.tar.xz wireguard-linux-223d32eb1001dabdb3fc278683361f61cd78b0e2.zip | |
dt-bindings: clock: st,stm32-rcc: support spread spectrum clocking
The addition of DT bindings for enabling and tuning spread spectrum
clocking generation is available only for the main PLL of stm32f{4,7}
platforms.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250114182021.670435-3-dario.binacchi@amarulasolutions.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to '')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml index 8f2494a0b28e..f83a6120d65a 100644 --- a/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml +++ b/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml @@ -53,6 +53,26 @@ properties: Phandle to system configuration controller. It can be used to control the power domain circuitry. + st,ssc-modfreq-hz: + description: + The modulation frequency for main PLL (in Hz) + + st,ssc-moddepth-permyriad: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The modulation rate for main PLL (in permyriad, i.e. 0.01%) + minimum: 25 + maximum: 200 + + st,ssc-modmethod: + $ref: /schemas/types.yaml#/definitions/string + description: + The modulation techniques for main PLL. + items: + enum: + - center-spread + - down-spread + required: - compatible - reg @@ -78,6 +98,10 @@ allOf: - description: high speed external (HSE) clock input - description: low speed external (LSE) clock input - description: Inter-IC sound (I2S) clock input + st,ssc-modfreq-hz: false + st,ssc-moddepth-permyriad: false + st,ssc-modmethod: false + else: properties: '#clock-cells': @@ -96,6 +120,18 @@ additionalProperties: false examples: # Reset and Clock Control Module node: - | + clock-controller@40023800 { + compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; + reg = <0x40023800 0x400>; + #clock-cells = <2>; + #reset-cells = <1>; + clocks = <&clk_hse>, <&clk_i2s_ckin>; + st,syscfg = <&pwrcfg>; + st,ssc-modfreq-hz = <10000>; + st,ssc-moddepth-permyriad = <200>; + st,ssc-modmethod = "center-spread"; + }; + - | clock-controller@58024400 { compatible = "st,stm32h743-rcc", "st,stm32-rcc"; reg = <0x58024400 0x400>; |