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| author |   Marek Vasut <marex@denx.de> | 2024-11-06 00:40:41 +0100 |
|---|---|---|
| committer |   Alexandre Torgue <alexandre.torgue@foss.st.com> | 2024-12-09 18:38:08 +0100 |
| commit | 41e12cebd9c39c9ef7b6686f2c4e8bc451a386fc (patch) | |
| tree | 22c468b6b6990399a2beb7c7d6f780e467c1758d | |
| parent | ARM: dts: stm32: Increase CPU core voltage on STM32MP13xx DHCOR SoM (diff) | |
| download | wireguard-linux-41e12cebd9c39c9ef7b6686f2c4e8bc451a386fc.tar.xz wireguard-linux-41e12cebd9c39c9ef7b6686f2c4e8bc451a386fc.zip | |
ARM: dts: stm32: Sort M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT
Move the M24256E write-lockable page subnode after RTC subnode in
DH STM32MP13xx DHCOR SoM DT to keep the list of nodes sorted by I2C
address. No functional change.
Fixes: 3f2e7d167307 ("ARM: dts: stm32: Describe M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi index 34a7ebfcef0e..6236ce2a6968 100644 --- a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi @@ -201,17 +201,17 @@ pagesize = <64>; }; - eeprom0wl: eeprom@58 { - compatible = "st,24256e-wl"; /* ST M24256E WL page of 0x50 */ - pagesize = <64>; - reg = <0x58>; - }; - rv3032: rtc@51 { compatible = "microcrystal,rv3032"; reg = <0x51>; interrupts-extended = <&gpioi 0 IRQ_TYPE_EDGE_FALLING>; }; + + eeprom0wl: eeprom@58 { + compatible = "st,24256e-wl"; /* ST M24256E WL page of 0x50 */ + pagesize = <64>; + reg = <0x58>; + }; }; &iwdg2 { |