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| author |   Shawn Guo <shawn.guo@linaro.org> | 2017-08-09 14:30:45 +0800 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2017-08-14 09:51:14 +0800 |
| commit | 41ec0d50e29e14946ab135ef89a5571b5ec1455a (patch) | |
| tree | 0003f524dd09cd37906ed29aefaaa21a939608b4 | |
| parent | arm64: dts: zx296718: add pinctrl and gpio devices (diff) | |
| download | wireguard-linux-41ec0d50e29e14946ab135ef89a5571b5ec1455a.tar.xz wireguard-linux-41ec0d50e29e14946ab135ef89a5571b5ec1455a.zip | |
arm64: dts: zx296718: set a better parent clock for I2S0
The default I2S0 parent clock AUDIO_24M can not be divided into required
sample rate in some cases, for example when 48KHz is needed. Change the
parent clock to AUDIO_99M which works for most sample rates.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/zte/zx296718.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi b/arch/arm64/boot/dts/zte/zx296718.dtsi index 52b5f84818ca..8aa40fc1e96b 100644 --- a/arch/arm64/boot/dts/zte/zx296718.dtsi +++ b/arch/arm64/boot/dts/zte/zx296718.dtsi @@ -564,6 +564,8 @@ clocks = <&audiocrm AUDIO_I2S0_WCLK>, <&audiocrm AUDIO_I2S0_PCLK>; clock-names = "wclk", "pclk"; + assigned-clocks = <&audiocrm I2S0_WCLK_MUX>; + assigned-clock-parents = <&topcrm AUDIO_99M>; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; dmas = <&dma 22>, <&dma 23>; dma-names = "tx", "rx"; |