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authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2025-02-20 11:55:12 +0100
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2025-02-25 10:00:33 +0100
commit454a1e3cd36c113341d7b71e8e691c6e47ab4a8a (patch)
treeac833f0105f1754c0e406d3ba9eb3dcddc916f73
parentarm64: dts: mediatek: mt8395-genio-1200-evk: add support for TCPC port (diff)
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wireguard-linux-454a1e3cd36c113341d7b71e8e691c6e47ab4a8a.zip
dt-bindings: usb: mediatek,mtk-xhci: Add port for SuperSpeed EP
Add a port used to connect the SuperSpeed output endpoint to a Type-C connector. Note that the MediaTek XHCI controllers are always in front of a different controller handling the USB HS (usually, MTU3), so the only port that this controller provides is SuperSpeed, while the HighSpeed one comes from elsewhere. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250220105514.43107-2-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Diffstat (limited to '')
-rw-r--r--Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml4
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
index ef3143f4b794..004d3ebec091 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
@@ -106,6 +106,10 @@ properties:
- description: USB3/SS(P) PHY
- description: USB2/HS PHY
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Super Speed (SS) Output endpoint to a Type-C connector
+
vusb33-supply:
description: Regulator of USB AVDD3.3v