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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2024-12-17 07:12:26 +0100
committerRob Herring (Arm) <robh@kernel.org>2024-12-18 13:29:40 -0600
commit4c2a458eb5c0de1ba120ac03374290068e39c418 (patch)
tree1c348e31118f9d600f8e836d610a4f8c08d790e4
parentdt-bindings: interrupt-controller: update imsic reg address to 0x24000000 in Example 1 (diff)
downloadwireguard-linux-4c2a458eb5c0de1ba120ac03374290068e39c418.tar.xz
wireguard-linux-4c2a458eb5c0de1ba120ac03374290068e39c418.zip
dt-bindings: interrupt-controller: arm,gic: Correct VGIC interrupt description
The description of VGIC interrupt referenced obsolete "see below" after converting TXT to DT Schema in commit 66ed144f147a ("dt-bindings: interrupt-controller: Convert ARM GIC to json-schema"), because there is no dedicated "VGIC" chapter anymore below. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Marc Zyngier <maz@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241217061226.14139-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Diffstat (limited to '')
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
index a2846e493497..7173c4b5a228 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
@@ -110,8 +110,8 @@ properties:
interrupts:
description: Interrupt source of the parent interrupt controller on
- secondary GICs, or VGIC maintenance interrupt on primary GIC (see
- below).
+ secondary GICs, or VGIC maintenance interrupt on primary GIC (see "GICv2
+ with virtualization extensions" paragraph in the "reg" property).
maxItems: 1
cpu-offset: