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| author |   Bryan Brattlof <bb@ti.com> | 2024-10-08 18:50:53 +0530 |
|---|---|---|
| committer |   Vignesh Raghavendra <vigneshr@ti.com> | 2024-11-03 11:29:57 +0530 |
| commit | 50f5ad2cb52f322d472dfb451881bea7d7d78d32 (patch) | |
| tree | 13bac50c25884b2ce7ebbcb553d30f7ce4716ae2 | |
| parent | arm64: dts: ti: k3-am62p: add opp frequencies (diff) | |
| download | wireguard-linux-50f5ad2cb52f322d472dfb451881bea7d7d78d32.tar.xz wireguard-linux-50f5ad2cb52f322d472dfb451881bea7d7d78d32.zip | |
arm64: dts: ti: k3-am62p5-sk: add 1.4ghz opp entry
The AM62Px reference board is capable of supplying 0v85 to the VDD_CORE
which allows the Cortex-A53s to operate at 1.4GHz according to chapter
6.6 of the SoC's data sheet[0] . Append the 1.4Ghz entry to the OPP
table to enable this frequency
[0] https://www.ti.com/lit/ds/symlink/am62p-q1.pdf
Signed-off-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20241008132052.407994-5-d-gole@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts index 3efa12bb7254..7f3dc39e12bc 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -128,6 +128,15 @@ }; }; + opp-table { + /* Requires VDD_CORE at 0v85 */ + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-supported-hw = <0x01 0x0004>; + clock-latency-ns = <6000000>; + }; + }; + tlv320_mclk: clk-0 { #clock-cells = <0>; compatible = "fixed-clock"; |