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| author |   Cody Eksal <masterr3c0rd@epochal.quest> | 2024-12-18 09:01:19 -0400 |
|---|---|---|
| committer |   Chen-Yu Tsai <wens@csie.org> | 2024-12-21 00:17:05 +0800 |
| commit | 53c54d9b9379e2a3eaec015556a51e47957a8d92 (patch) | |
| tree | be7327282cb1e18f27c1f897fe0529d933c282c9 | |
| parent | dt-bindings: sram: sunxi-sram: Add A100 compatible (diff) | |
| download | wireguard-linux-53c54d9b9379e2a3eaec015556a51e47957a8d92.tar.xz wireguard-linux-53c54d9b9379e2a3eaec015556a51e47957a8d92.zip | |
arm64: dts: allwinner: a100: Add syscon nodes
The Allwinner A100 has a system configuration block, denoted as SYS_CFG
in the user manual's memory map. It is undocumented in the manual, but
a glance at the vendor tree shows this block is similar to its
predecessors in the A64 and H6. The A100 also has 3 SRAM blocks: A1, A2,
and C. Add all of these to the SoC's device tree.
Reviewed-by: Parthiban Nallathambi <parthiban@linumiz.com>
Signed-off-by: Cody Eksal <masterr3c0rd@epochal.quest>
Link: https://patch.msgid.link/20241218-a100-syscon-v2-2-dae60b9ce192@epochal.quest
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index 29ac7716c7a5..a24adba201af 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -101,6 +101,39 @@ #size-cells = <1>; ranges = <0 0 0 0x3fffffff>; + syscon: syscon@3000000 { + compatible = "allwinner,sun50i-a100-system-control", + "allwinner,sun50i-a64-system-control"; + reg = <0x03000000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sram_a1: sram@20000 { + compatible = "mmio-sram"; + reg = <0x00020000 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00020000 0x4000>; + }; + + sram_c: sram@24000 { + compatible = "mmio-sram"; + reg = <0x024000 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x024000 0x21000>; + }; + + sram_a2: sram@100000 { + compatible = "mmio-sram"; + reg = <0x0100000 0x14000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0100000 0x14000>; + }; + }; + ccu: clock@3001000 { compatible = "allwinner,sun50i-a100-ccu"; reg = <0x03001000 0x1000>; |