diff options
| author |   Quentin Schulz <quentin.schulz@cherry.de> | 2025-02-25 12:53:30 +0100 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2025-02-27 14:28:48 +0100 |
| commit | 55de171bba1b8c0e3dd18b800955ac4b46a63d4b (patch) | |
| tree | d78ca351998fad44515f4ceea1274af69f24e34d | |
| parent | arm64: dts: rockchip: fix pinmux of UART0 for PX30 Ringneck on Haikou (diff) | |
| download | wireguard-linux-55de171bba1b8c0e3dd18b800955ac4b46a63d4b.tar.xz wireguard-linux-55de171bba1b8c0e3dd18b800955ac4b46a63d4b.zip | |
arm64: dts: rockchip: fix pinmux of UART5 for PX30 Ringneck on Haikou
UART5 uses GPIO0_B5 as UART RTS but muxed in its GPIO function,
therefore UART5 must request this pin to be muxed in that function, so
let's do that.
Fixes: 5963d97aa780 ("arm64: dts: rockchip: add rs485 support on uart5 of px30-ringneck-haikou")
Cc: stable@vger.kernel.org
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250225-ringneck-dtbos-v3-2-853a9a6dd597@cherry.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts index 6d45a19413ce..1a59e8b1dc46 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts @@ -194,6 +194,13 @@ <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + uart { + uart5_rts_pin: uart5-rts-pin { + rockchip,pins = + <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &pwm0 { @@ -228,6 +235,9 @@ }; &uart5 { + /* Add pinmux for rts-gpios (uart5_rts_pin) */ + pinctrl-names = "default"; + pinctrl-0 = <&uart5_xfer &uart5_rts_pin>; rts-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; status = "okay"; }; |