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| author |   Jonas Karlman <jonas@kwiboo.se> | 2025-03-04 20:16:36 +0000 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2025-03-08 18:15:48 +0100 |
| commit | 6e58302c84ce90aadbecd41efe1f69098a6f91e5 (patch) | |
| tree | b9476d0a7eb9118e0f7539a6f0c9b2e33aca1f9d | |
| parent | arm64: dts: rockchip: Add user button to Radxa E20C (diff) | |
| download | wireguard-linux-6e58302c84ce90aadbecd41efe1f69098a6f91e5.tar.xz wireguard-linux-6e58302c84ce90aadbecd41efe1f69098a6f91e5.zip | |
arm64: dts: rockchip: Add SARADC node for RK3528
Add a device tree node for the SARADC controller used by RK3528.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250304201642.831218-4-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3528.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index 4be53868f324..c2eaa0c6ea90 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -9,6 +9,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/clock/rockchip,rk3528-cru.h> +#include <dt-bindings/reset/rockchip,rk3528-cru.h> / { compatible = "rockchip,rk3528"; @@ -455,6 +456,18 @@ status = "disabled"; }; + saradc: adc@ffae0000 { + compatible = "rockchip,rk3528-saradc"; + reg = <0x0 0xffae0000 0x0 0x10000>; + clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; + resets = <&cru SRST_P_SARADC>; + reset-names = "saradc-apb"; + #io-channel-cells = <1>; + status = "disabled"; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3528-pinctrl"; rockchip,grf = <&ioc_grf>; |