diff options
| author |   Igor Belwon <igor.belwon@mentallysanemainliners.org> | 2024-12-24 04:33:36 +0100 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-12-30 08:23:29 +0100 |
| commit | 72f6ec2ba8061ac9e911a83b91e3f180f996d981 (patch) | |
| tree | 67c12e52eaaec04e725238a3ce6a7c202e311a30 | |
| parent | Merge branch 'for-v6.14/dt-bindings-clk-samsung' into next/dt64 (diff) | |
| download | wireguard-linux-72f6ec2ba8061ac9e911a83b91e3f180f996d981.tar.xz wireguard-linux-72f6ec2ba8061ac9e911a83b91e3f180f996d981.zip | |
arm64: dts: exynos990: Add clock management unit nodes
Add CMU nodes for:
- cmu_top: provides clocks for other blocks
- cmu_hsi0: provides clocks for usb31
Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20241224-cmu-v3-1-33ca24b2413c@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos990.dtsi | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi index c53df5d7c3a3..9d017dbed952 100644 --- a/arch/arm64/boot/dts/exynos/exynos990.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi @@ -5,6 +5,7 @@ * Copyright (c) 2024, Igor Belwon <igor.belwon@mentallysanemainliners.org> */ +#include <dt-bindings/clock/samsung,exynos990.h> #include <dt-bindings/interrupt-controller/arm-gic.h> / { @@ -206,6 +207,23 @@ interrupts = <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>; }; + cmu_hsi0: clock-controller@10a00000 { + compatible = "samsung,exynos990-cmu-hsi0"; + reg = <0x10a00000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>, + <&cmu_top CLK_DOUT_CMU_HSI0_BUS>, + <&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>, + <&cmu_top CLK_DOUT_CMU_HSI0_USBDP_DEBUG>, + <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>; + clock-names = "oscclk", + "bus", + "usb31drd", + "usbdp_debug", + "dpgtc"; + }; + pinctrl_hsi1: pinctrl@13040000 { compatible = "samsung,exynos990-pinctrl"; reg = <0x13040000 0x1000>; @@ -252,6 +270,15 @@ compatible = "samsung,exynos990-pinctrl"; reg = <0x15c30000 0x1000>; }; + + cmu_top: clock-controller@1a330000 { + compatible = "samsung,exynos990-cmu-top"; + reg = <0x1a330000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>; + clock-names = "oscclk"; + }; }; timer { |