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author | 2021-12-28 01:20:20 -0800 | |
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committer | 2022-03-09 13:59:15 -0800 | |
commit | 8c9ab55c0fbdc76cb876140c2dad75a610bb23ef (patch) | |
tree | fa1d77ae433a07ecef3e1afc529cd0122d5452ca | |
parent | xtensa: use XCHAL_NUM_AREGS as pt_regs::areg size (diff) | |
download | wireguard-linux-8c9ab55c0fbdc76cb876140c2dad75a610bb23ef.tar.xz wireguard-linux-8c9ab55c0fbdc76cb876140c2dad75a610bb23ef.zip |
xtensa: add missing XCHAL_HAVE_WINDOWED check
Add missing preprocessor conditions to secondary reset vector code.
Fixes: 09af39f649da ("xtensa: use register window specific opcodes only when present")
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to '')
-rw-r--r-- | arch/xtensa/kernel/mxhead.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/xtensa/kernel/mxhead.S b/arch/xtensa/kernel/mxhead.S index 9f3843742726..b702c0908b1f 100644 --- a/arch/xtensa/kernel/mxhead.S +++ b/arch/xtensa/kernel/mxhead.S @@ -37,11 +37,13 @@ _SetupOCD: * xt-gdb to single step via DEBUG exceptions received directly * by ocd. */ +#if XCHAL_HAVE_WINDOWED movi a1, 1 movi a0, 0 wsr a1, windowstart wsr a0, windowbase rsync +#endif movi a1, LOCKLEVEL wsr a1, ps |