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| author |   Xu Lu <luxu.kernel@bytedance.com> | 2025-01-03 17:32:19 +0800 |
|---|---|---|
| committer |   Joerg Roedel <jroedel@suse.de> | 2025-01-06 12:37:19 +0100 |
| commit | 8d8d3752c0a4f7fb072352837cbdbf57c02df239 (patch) | |
| tree | aeb2f10f1b12dc6ff9782713ab906f55da9e4975 | |
| parent | iommu/riscv: Add support for platform msi (diff) | |
| download | wireguard-linux-8d8d3752c0a4f7fb072352837cbdbf57c02df239.tar.xz wireguard-linux-8d8d3752c0a4f7fb072352837cbdbf57c02df239.zip | |
iommu/riscv: Empty iommu queue before enabling it
Changing cqen/fqen/pqen from 0 to 1 sets the cqh/fqt/pqt registers to 0.
But the cqt/fqh/pqh registers are left unmodified. This commit resets
cqt/fqh/pqh registers to ensure corresponding queues are empty before
being enabled during initialization.
Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
Link: https://lore.kernel.org/r/20250103093220.38106-2-luxu.kernel@bytedance.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to '')
| -rw-r--r-- | drivers/iommu/riscv/iommu.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c index 8a05def774bd..84806724f568 100644 --- a/drivers/iommu/riscv/iommu.c +++ b/drivers/iommu/riscv/iommu.c @@ -240,6 +240,12 @@ static int riscv_iommu_queue_enable(struct riscv_iommu_device *iommu, return rc; } + /* Empty queue before enabling it */ + if (queue->qid == RISCV_IOMMU_INTR_CQ) + riscv_iommu_writel(queue->iommu, Q_TAIL(queue), 0); + else + riscv_iommu_writel(queue->iommu, Q_HEAD(queue), 0); + /* * Enable queue with interrupts, clear any memory fault if any. * Wait for the hardware to acknowledge request and activate queue |