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| author |   Frank Li <Frank.Li@nxp.com> | 2025-02-21 16:15:59 -0500 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2025-03-11 10:19:45 +0800 |
| commit | 969497ebefcfe69c8d0ee6f6291102418d5589b1 (patch) | |
| tree | ee1a7927ef00d8b42c6f2f41cfd1d890d1177b28 | |
| parent | arm64: dts: imx95: Add #io-channel-cells = <1> for adc node (diff) | |
| download | wireguard-linux-969497ebefcfe69c8d0ee6f6291102418d5589b1.tar.xz wireguard-linux-969497ebefcfe69c8d0ee6f6291102418d5589b1.zip | |
arm64: dts: imx95: Add i3c1 and i3c2
Add i3c1 and i3c2 support.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx95.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi index 69a4a2db3463..51625bc9154e 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -673,6 +673,19 @@ status = "disabled"; }; + i3c2: i3c@42520000 { + compatible = "silvaco,i3c-master-v1"; + reg = <0x42520000 0x10000>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&scmi_clk IMX95_CLK_BUSAON>, + <&scmi_clk IMX95_CLK_I3C2>, + <&scmi_clk IMX95_CLK_I3C2SLOW>; + clock-names = "pclk", "fast_clk", "slow_clk"; + status = "disabled"; + }; + lpi2c3: i2c@42530000 { compatible = "fsl,imx95-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x42530000 0x10000>; @@ -1245,6 +1258,19 @@ status = "disabled"; }; + i3c1: i3c@44330000 { + compatible = "silvaco,i3c-master-v1"; + reg = <0x44330000 0x10000>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&scmi_clk IMX95_CLK_BUSAON>, + <&scmi_clk IMX95_CLK_I3C1>, + <&scmi_clk IMX95_CLK_I3C1SLOW>; + clock-names = "pclk", "fast_clk", "slow_clk"; + status = "disabled"; + }; + lpi2c1: i2c@44340000 { compatible = "fsl,imx95-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x44340000 0x10000>; |