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| author |   Marek Vasut <marex@denx.de> | 2024-11-05 23:46:22 +0100 |
|---|---|---|
| committer |   Alexandre Torgue <alexandre.torgue@foss.st.com> | 2024-12-09 18:38:08 +0100 |
| commit | a4422a9183278162093d4524fdf4b6bbd7dd8a28 (patch) | |
| tree | 451584d1836ce9d74693f988bfe6cc8e3f8c1a5b | |
| parent | ARM: dts: stm32: Deduplicate serial aliases and chosen node for STM32MP15xx DHCOM SoM (diff) | |
| download | wireguard-linux-a4422a9183278162093d4524fdf4b6bbd7dd8a28.tar.xz wireguard-linux-a4422a9183278162093d4524fdf4b6bbd7dd8a28.zip | |
ARM: dts: stm32: Increase CPU core voltage on STM32MP13xx DHCOR SoM
The STM32MP13xx DHCOR DHSBC is populated with STM32MP13xx part capable
of 1 GHz operation, increase the CPU core voltage to 1.35 V to make
sure the SoC is stable even if the blobs unconditionally force the CPU
to 1 GHz operation.
It is not possible to make use of CPUfreq on the STM32MP13xx because
the SCMI protocol 0x13 is not implemented by upstream OpTee-OS which
is the SCMI provider.
Fixes: 6331bddce649 ("ARM: dts: stm32: Add support for STM32MP13xx DHCOR SoM and DHSBC board")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi index 5edbc790d1d2..34a7ebfcef0e 100644 --- a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi @@ -85,8 +85,8 @@ vddcpu: buck1 { /* VDD_CPU_1V2 */ regulator-name = "vddcpu"; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; regulator-always-on; regulator-initial-mode = <0>; regulator-over-current-protection; |