diff options
| author |   Taniya Das <quic_tdas@quicinc.com> | 2025-02-21 15:04:54 +0530 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2025-03-13 16:45:22 -0500 |
| commit | c16e576b8aea9fe985ee9e368ea5fd37eae47b2f (patch) | |
| tree | 3978923274228f81edcc78af77adaf698e36d4bd | |
| parent | clk: qcom: gdsc: Update the status poll timeout for GDSC (diff) | |
| download | wireguard-linux-c16e576b8aea9fe985ee9e368ea5fd37eae47b2f.tar.xz wireguard-linux-c16e576b8aea9fe985ee9e368ea5fd37eae47b2f.zip | |
dt-bindings: clock: qcom: Add compatible for QCM6490 boards
On the QCM6490 boards, the LPASS firmware controls the complete clock
controller functionalities and associated power domains. However, only
the LPASS resets required to be controlled by the high level OS. Thus,
add the new QCM6490 compatible to support the reset functionality for
Low Power Audio subsystem.
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250221-lpass_qcm6490_resets-v5-1-6be0c0949a83@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to '')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml index 488d63959424..99ab9106009f 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml @@ -20,6 +20,7 @@ description: | properties: compatible: enum: + - qcom,qcm6490-lpassaudiocc - qcom,sc7280-lpassaoncc - qcom,sc7280-lpassaudiocc - qcom,sc7280-lpasscorecc @@ -68,7 +69,9 @@ allOf: properties: compatible: contains: - const: qcom,sc7280-lpassaudiocc + enum: + - qcom,qcm6490-lpassaudiocc + - qcom,sc7280-lpassaudiocc then: properties: |