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| author |   Olof Johansson <olof@lixom.net> | 2016-10-02 22:21:33 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2016-10-02 22:21:33 -0700 |
| commit | c1fd2794a4111501027dc60b3fd9d2a29789ea47 (patch) | |
| tree | 9d62059d8f7555befe109b0909791e88a664f1fb | |
| parent | Merge tag 'zte-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64 (diff) | |
| parent | arm64: dts: berlin4ct: Add L2 cache topology (diff) | |
| download | wireguard-linux-c1fd2794a4111501027dc60b3fd9d2a29789ea47.tar.xz wireguard-linux-c1fd2794a4111501027dc60b3fd9d2a29789ea47.zip | |
Merge tag 'berlin64-dt-for-v4.9-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt64
Berlin64 DT changes for v4.9
- enable dw wdt nodes unconditionally,
driver supports multiple instances now
- switch to Cortex-A53 pmu compatible
- add L2 cache topology
* tag 'berlin64-dt-for-v4.9-1' of git://git.infradead.org/users/hesselba/linux-berlin:
arm64: dts: berlin4ct: Add L2 cache topology
arm64: dts: berlin4ct: enable all wdt nodes unconditionally
arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi index 099ad93bb49b..85c23facb9fe 100644 --- a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi +++ b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi @@ -68,6 +68,7 @@ device_type = "cpu"; reg = <0x0>; enable-method = "psci"; + next-level-cache = <&l2>; cpu-idle-states = <&CPU_SLEEP_0>; }; @@ -76,6 +77,7 @@ device_type = "cpu"; reg = <0x1>; enable-method = "psci"; + next-level-cache = <&l2>; cpu-idle-states = <&CPU_SLEEP_0>; }; @@ -84,6 +86,7 @@ device_type = "cpu"; reg = <0x2>; enable-method = "psci"; + next-level-cache = <&l2>; cpu-idle-states = <&CPU_SLEEP_0>; }; @@ -92,9 +95,14 @@ device_type = "cpu"; reg = <0x3>; enable-method = "psci"; + next-level-cache = <&l2>; cpu-idle-states = <&CPU_SLEEP_0>; }; + l2: cache { + compatible = "cache"; + }; + idle-states { entry-method = "psci"; CPU_SLEEP_0: cpu-sleep-0 { @@ -115,7 +123,7 @@ }; pmu { - compatible = "arm,armv8-pmuv3"; + compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3"; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, @@ -279,7 +287,6 @@ reg = <0x4000 0x100>; clocks = <&osc>; interrupts = <1>; - status = "disabled"; }; wdt2: watchdog@5000 { @@ -287,7 +294,6 @@ reg = <0x5000 0x100>; clocks = <&osc>; interrupts = <2>; - status = "disabled"; }; sm_gpio0: gpio@8000 { |