diff options
| author |   Peng Fan <peng.fan@nxp.com> | 2024-08-05 11:05:35 +0800 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2024-08-13 11:23:22 +0800 |
| commit | d3c2b2a8923abc087c2e585f5828fb7fae8fedfe (patch) | |
| tree | cbcf52136a67c31e9c06902fb9ceb0b5211f39a1 | |
| parent | arm64: dts: imx95: correct a55 power-domains (diff) | |
| download | wireguard-linux-d3c2b2a8923abc087c2e585f5828fb7fae8fedfe.tar.xz wireguard-linux-d3c2b2a8923abc087c2e585f5828fb7fae8fedfe.zip | |
arm64: dts: imx95: correct L3Cache cache-sets
The L3Cache size is 512KB.
Size = Cache Line Size(64) * num sets(512) * Assoc(0x10).
Correct the number of Cache sets.
Fixes: 5e3cbb8e4256 ("arm64: dts: freescale: add i.MX95 basic dtsi")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx95.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi index 3499d4eb2496..425272aa5a81 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -187,7 +187,7 @@ compatible = "cache"; cache-size = <524288>; cache-line-size = <64>; - cache-sets = <1024>; + cache-sets = <512>; cache-level = <3>; cache-unified; }; |