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authorValentin Caron <valentin.caron@foss.st.com>2024-08-27 16:04:47 +0200
committerAlexandre Torgue <alexandre.torgue@foss.st.com>2024-10-29 16:41:42 +0100
commitd6b0d7a941c4fc9241d9cca66db5d8ff9d81cc8b (patch)
tree168270b2f7f8a6d4482500a77ea74e17005512d2
parentARM: dts: stm32: Describe M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT (diff)
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wireguard-linux-d6b0d7a941c4fc9241d9cca66db5d8ff9d81cc8b.zip
ARM: dts: stm32: rtc, add pin to provide LSCO on stm32mp15
Declare pin for LSCO in stm32-pinctrl provider node to reserve this pin for RTC OUT2_RMP, in stm32mp15-pinctrl.dtsi. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to '')
-rw-r--r--arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
index 70e132dc6147..95fafc51a1c8 100644
--- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
@@ -1697,6 +1697,13 @@
};
/omit-if-no-ref/
+ rtc_rsvd_pins_a: rtc-rsvd-0 {
+ pins {
+ pinmux = <STM32_PINMUX('I', 8, ANALOG)>; /* RTC_OUT2_RMP */
+ };
+ };
+
+ /omit-if-no-ref/
sai2a_pins_a: sai2a-0 {
pins {
pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */