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| author |   Stefan Kerkmann <s.kerkmann@pengutronix.de> | 2024-11-26 10:22:15 +0100 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2024-12-30 12:03:52 +0800 |
| commit | e05956dbe6f49fc85b2a7518e6626a6bd7b6aada (patch) | |
| tree | f7175b5f24d0711d147c65f902deae10f80151f9 | |
| parent | ARM: dts: imx6sl: add phy-3p0-supply to usb phys (diff) | |
| download | wireguard-linux-e05956dbe6f49fc85b2a7518e6626a6bd7b6aada.tar.xz wireguard-linux-e05956dbe6f49fc85b2a7518e6626a6bd7b6aada.zip | |
ARM: dts: imx6sx: add phy-3p0-supply to usb phys
The integrated usb phys are supplied by the 3p0 regulator, which has a
voltage range of 2.625V to 3.4V. Thus the min and max values are
corrected and the regulator added as a proper supply for the usb phys.
This fixes the following warnings during the probe of the mxs_phy
driver:
mxs_phy 20c9000.usbphy: supply phy-3p0 not found, using dummy regulator
mxs_phy 20ca000.usbphy: supply phy-3p0 not found, using dummy regulator
The regulator handling was introduced by commit `966d73152078 (usb: phy:
mxs: enable regulator phy-3p0 to improve signal qualilty, 2024-07-26)`.
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi index a9550f115f82..5132b575b001 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -637,8 +637,8 @@ reg_vdd3p0: regulator-3p0 { compatible = "fsl,anatop-regulator"; regulator-name = "vdd3p0"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <3150000>; + regulator-min-microvolt = <2625000>; + regulator-max-microvolt = <3400000>; regulator-always-on; anatop-reg-offset = <0x120>; anatop-vol-bit-shift = <8>; @@ -731,6 +731,7 @@ reg = <0x020c9000 0x1000>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SX_CLK_USBPHY1>; + phy-3p0-supply = <®_vdd3p0>; fsl,anatop = <&anatop>; }; @@ -739,6 +740,7 @@ reg = <0x020ca000 0x1000>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SX_CLK_USBPHY2>; + phy-3p0-supply = <®_vdd3p0>; fsl,anatop = <&anatop>; }; |