diff options
| author |   Sander Vanheule <sander@svanheule.net> | 2025-01-19 19:34:17 +0100 |
|---|---|---|
| committer |   Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2025-02-21 15:09:56 +0100 |
| commit | e5723ab63217987982742e9a45dad9fd0f4d7080 (patch) | |
| tree | 56759950446742b75c5919859087cb4db5ac828c | |
| parent | mips: dts: realtek: Decouple RTL930x base DTSI (diff) | |
| download | wireguard-linux-e5723ab63217987982742e9a45dad9fd0f4d7080.tar.xz wireguard-linux-e5723ab63217987982742e9a45dad9fd0f4d7080.zip | |
mips: dts: realtek: Clean up CPU clocks
The referenced CPU clock does not require any additional #clock-cells,
so drop the extraneous '0' in the referenced CPU clock.
The binding for MIPS cpus also does not allow for the clock-names
property, so just drop it.
This resolves some error message from 'dtbs_check':
cpu@0: clocks: [[4], [0]] is too long
'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # For RTL9302C
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to '')
| -rw-r--r-- | arch/mips/boot/dts/realtek/rtl838x.dtsi | 3 | ||||
| -rw-r--r-- | arch/mips/boot/dts/realtek/rtl930x.dtsi | 3 |
2 files changed, 2 insertions, 4 deletions
diff --git a/arch/mips/boot/dts/realtek/rtl838x.dtsi b/arch/mips/boot/dts/realtek/rtl838x.dtsi index 722106e39194..d2c6baabb38c 100644 --- a/arch/mips/boot/dts/realtek/rtl838x.dtsi +++ b/arch/mips/boot/dts/realtek/rtl838x.dtsi @@ -9,8 +9,7 @@ device_type = "cpu"; compatible = "mips,mips4KEc"; reg = <0>; - clocks = <&baseclk 0>; - clock-names = "cpu"; + clocks = <&baseclk>; }; }; diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi index 67261d6fcaa7..f2e57ea3a60c 100644 --- a/arch/mips/boot/dts/realtek/rtl930x.dtsi +++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi @@ -26,8 +26,7 @@ device_type = "cpu"; compatible = "mips,mips34Kc"; reg = <0>; - clocks = <&baseclk 0>; - clock-names = "cpu"; + clocks = <&baseclk>; }; }; |