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| author |   Bjorn Andersson <bjorn.andersson@linaro.org> | 2016-07-15 17:42:14 -0700 |
|---|---|---|
| committer |   Andy Gross <andy.gross@linaro.org> | 2016-08-23 22:57:35 -0500 |
| commit | e95c08f45a8ecf9fa2e106f7e8243b7c850bde7f (patch) | |
| tree | 87aa2023827f910b89214ab59c2bfda8b7bcbd28 | |
| parent | arm64: dts: qcom: msm8916: Make scm a reset-controller (diff) | |
| download | wireguard-linux-e95c08f45a8ecf9fa2e106f7e8243b7c850bde7f.tar.xz wireguard-linux-e95c08f45a8ecf9fa2e106f7e8243b7c850bde7f.zip | |
arm64: dts: qcom: msm8916: Add tcsr syscon
The TCSR memory segment includes various functionality, among other
things the halt-registers for the Hexagon.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 1e67acc19a9d..64f85f82602c 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -234,6 +234,11 @@ reg = <0x1905000 0x20000>; }; + tcsr: syscon@1937000 { + compatible = "qcom,tcsr-msm8916", "syscon"; + reg = <0x1937000 0x30000>; + }; + tcsr_mutex: hwlock { compatible = "qcom,tcsr-mutex"; syscon = <&tcsr_mutex_regs 0 0x1000>; |