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| author |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-12-22 15:52:57 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-02-12 21:15:35 +0100 |
| commit | ee24a95b891a215b5fbd2f6814754301070653c0 (patch) | |
| tree | 1d61cdcdc243f92e06a359aedbe7178ee63e8c30 | |
| parent | arm64: dts: exynos8895-dreamlte: enable support for the touchscreen (diff) | |
| download | wireguard-linux-ee24a95b891a215b5fbd2f6814754301070653c0.tar.xz wireguard-linux-ee24a95b891a215b5fbd2f6814754301070653c0.zip | |
arm64: dts: exynos8895: Rename PMU nodes to fixup sorting
Nodes should be sorted by name but it is also nice to have same class of
devices together, so rename both PMU nodes (A53 and M2) to use "pmu"
prefix, instead of suffix.
Link: https://lore.kernel.org/r/20241222145257.31451-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos8895.dtsi | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi index 1f85e1c58f00..f92d2a8a20a2 100644 --- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi @@ -26,30 +26,6 @@ pinctrl7 = &pinctrl_peric1; }; - arm-a53-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, - <&cpu1>, - <&cpu2>, - <&cpu3>; - }; - - mongoose-m2-pmu { - compatible = "samsung,mongoose-pmu"; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu4>, - <&cpu5>, - <&cpu6>, - <&cpu7>; - }; - cpus { #address-cells = <1>; #size-cells = <0>; @@ -149,6 +125,30 @@ clock-output-names = "oscclk"; }; + pmu-a53 { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; + }; + + pmu-mongoose-m2 { + compatible = "samsung,mongoose-pmu"; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu4>, + <&cpu5>, + <&cpu6>, + <&cpu7>; + }; + psci { compatible = "arm,psci"; method = "smc"; |