diff options
| author |   Alessandro Grassi <alessandro.grassi@mailbox.org> | 2025-05-02 11:55:20 +0200 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2025-05-14 10:56:43 +0200 |
| commit | fb98bd0a13de2c9d96cb5c00c81b5ca118ac9d71 (patch) | |
| tree | ece1c20c6cac02062ac0557629ea064adf9ef44c | |
| parent | spi: tegra114: Use value to check for invalid delays (diff) | |
| download | wireguard-linux-fb98bd0a13de2c9d96cb5c00c81b5ca118ac9d71.tar.xz wireguard-linux-fb98bd0a13de2c9d96cb5c00c81b5ca118ac9d71.zip | |
spi: spi-sun4i: fix early activation
The SPI interface is activated before the CPOL setting is applied. In
that moment, the clock idles high and CS goes low. After a short delay,
CPOL and other settings are applied, which may cause the clock to change
state and idle low. This transition is not part of a clock cycle, and it
can confuse the receiving device.
To prevent this unexpected transition, activate the interface while CPOL
and the other settings are being applied.
Signed-off-by: Alessandro Grassi <alessandro.grassi@mailbox.org>
Link: https://patch.msgid.link/20250502095520.13825-1-alessandro.grassi@mailbox.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to '')
| -rw-r--r-- | drivers/spi/spi-sun4i.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index f89826d7dc49..aa92fd5a35a9 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -264,6 +264,9 @@ static int sun4i_spi_transfer_one(struct spi_controller *host, else reg |= SUN4I_CTL_DHB; + /* Now that the settings are correct, enable the interface */ + reg |= SUN4I_CTL_ENABLE; + sun4i_spi_write(sspi, SUN4I_CTL_REG, reg); /* Ensure that we have a parent clock fast enough */ @@ -404,7 +407,7 @@ static int sun4i_spi_runtime_resume(struct device *dev) } sun4i_spi_write(sspi, SUN4I_CTL_REG, - SUN4I_CTL_ENABLE | SUN4I_CTL_MASTER | SUN4I_CTL_TP); + SUN4I_CTL_MASTER | SUN4I_CTL_TP); return 0; |