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author | 2016-07-27 22:24:05 +0800 | |
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committer | 2016-08-24 11:29:07 +0200 | |
commit | fe996215156e56cd5c51a86aaf0e53a137a0136f (patch) | |
tree | 578462dd9526d2842cf5678bd0ff336f14ba1daa | |
parent | arm64: dts: rockchip: configure usb2-phy support for rk3399-evb (diff) | |
download | wireguard-linux-fe996215156e56cd5c51a86aaf0e53a137a0136f.tar.xz wireguard-linux-fe996215156e56cd5c51a86aaf0e53a137a0136f.zip |
arm64: dts: rockchip: add the saradc for rk3399
This patch adds saradc needed information on rk3399 SoCs.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to '')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 62d450935a57..bc86e8c8bb46 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -303,6 +303,18 @@ }; }; + saradc: saradc@ff100000 { + compatible = "rockchip,rk3399-saradc"; + reg = <0x0 0xff100000 0x0 0x100>; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + resets = <&cru SRST_P_SARADC>; + reset-names = "saradc-apb"; + status = "disabled"; + }; + i2c1: i2c@ff110000 { compatible = "rockchip,rk3399-i2c"; reg = <0x0 0xff110000 0x0 0x1000>; |