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authorAlexandre Mergnat <amergnat@baylibre.com>2023-04-04 18:29:51 +0200
committerLinus Walleij <linus.walleij@linaro.org>2023-04-11 00:19:58 +0200
commit29a66a6c71d6fdec7786fdeff0209f64998bcbe3 (patch)
tree5035f801e754a9e1a4de93539f59be3bdcdc05ec
parentdt-bindings: pinctrl: mediatek: deprecate custom bias pull properties for mt8365 (diff)
downloadwireguard-linux-29a66a6c71d6fdec7786fdeff0209f64998bcbe3.tar.xz
wireguard-linux-29a66a6c71d6fdec7786fdeff0209f64998bcbe3.zip
dt-bindings: pinctrl: mediatek,mt8365-pinctrl: add drive strength property
This SoC is able to drive the following output current: - 2 mA - 4 mA - 6 mA - 8 mA - 10 mA - 12 mA - 14 mA - 16 mA Then drive-strength property is set with enum to reflect its HW capability. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230327-cleanup-pinctrl-binding-v3-3-6f56d5c7a8de@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to '')
-rw-r--r--Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
index 75d74b92c767..61b33b5416f5 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
@@ -99,6 +99,9 @@ patternProperties:
102: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
103: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
+ drive-strength:
+ enum: [2, 4, 6, 8, 10, 12, 14, 16]
+
input-enable: true
input-disable: true