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| author |   Inochi Amaoto <inochiama@outlook.com> | 2024-04-11 20:12:40 +0800 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2024-05-13 14:26:34 -0700 |
| commit | 92cce91949a497a8a4615f9ba5813b03f7a1f1d5 (patch) | |
| tree | a2423d1b82f828a886704524434d558206abbcbb | |
| parent | Merge patch series "riscv: ASID-related and UP-related TLB flush enhancements" (diff) | |
| download | wireguard-linux-92cce91949a497a8a4615f9ba5813b03f7a1f1d5.tar.xz wireguard-linux-92cce91949a497a8a4615f9ba5813b03f7a1f1d5.zip | |
riscv: defconfig: Enable CONFIG_CLK_SOPHGO_CV1800
CONFIG_CLK_SOPHGO_CV1800 is required when booting the minimum
system for CV1800 series board.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB49537E8B2D1FAAA7D5B8BDA2BB052@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/riscv/configs/defconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index fc0ec2ee13bc..8c8a77f8eac2 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -233,6 +233,7 @@ CONFIG_VIRTIO_BALLOON=y CONFIG_VIRTIO_INPUT=y CONFIG_VIRTIO_MMIO=y CONFIG_RENESAS_OSTM=y +CONFIG_CLK_SOPHGO_CV1800=y CONFIG_SUN8I_DE2_CCU=m CONFIG_SUN50I_IOMMU=y CONFIG_RPMSG_CHAR=y |