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authorJakub Kicinski <kuba@kernel.org>2025-04-25 19:22:03 -0700
committerJakub Kicinski <kuba@kernel.org>2025-04-28 06:17:46 -0700
commite527e891492d9e81325967e51a1d21b259318d0e (patch)
tree8832284880962744c76d72183636130edc358702
parentnet: stmmac: dwmac-loongson: Move queue number init to common function (diff)
parentnet: stmmac: socfpga: Remove unused pcs-mdiodev field (diff)
downloadwireguard-linux-e527e891492d9e81325967e51a1d21b259318d0e.tar.xz
wireguard-linux-e527e891492d9e81325967e51a1d21b259318d0e.zip
Merge branch 'net-stmmac-socfpga-1000basex-support-and-cleanups'
Maxime Chevallier says: ==================== net: stmmac: socfpga: 1000BaseX support and cleanups This small series sorts-out 1000BaseX support and does a bit of cleanup for the Lynx conversion. Patch 1 makes sure that we set the right phy_mode when working in 1000BaseX mode, so that the internal GMII is configured correctly. Patch 2 removes a check for phy_device upon calling fix_mac_speed(). As the SGMII adapter may be chained to a Lynx PCS, checking for a phy_device to be attached to the netdev before enabling the SGMII adapter doesn't make sense, as we won't have a downstream PHY when using 1000BaseX. Patch 3 cleans an unused field from the PCS conversion. v1: https://lore.kernel.org/20250422094701.49798-1-maxime.chevallier@bootlin.com v2: https://lore.kernel.org/20250423104646.189648-1-maxime.chevallier@bootlin.com ==================== Link: https://patch.msgid.link/20250424071223.221239-1-maxime.chevallier@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to '')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
index 59f90b123c5b..72b50f6d72f4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -59,17 +59,15 @@ struct socfpga_dwmac {
void __iomem *sgmii_adapter_base;
bool f2h_ptp_ref_clk;
const struct socfpga_dwmac_ops *ops;
- struct mdio_device *pcs_mdiodev;
};
-static void socfpga_dwmac_fix_mac_speed(void *priv, int speed, unsigned int mode)
+static void socfpga_dwmac_fix_mac_speed(void *bsp_priv, int speed,
+ unsigned int mode)
{
- struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv;
+ struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)bsp_priv;
+ struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dwmac->dev));
void __iomem *splitter_base = dwmac->splitter_base;
void __iomem *sgmii_adapter_base = dwmac->sgmii_adapter_base;
- struct device *dev = dwmac->dev;
- struct net_device *ndev = dev_get_drvdata(dev);
- struct phy_device *phy_dev = ndev->phydev;
u32 val;
if (sgmii_adapter_base)
@@ -96,7 +94,9 @@ static void socfpga_dwmac_fix_mac_speed(void *priv, int speed, unsigned int mode
writel(val, splitter_base + EMAC_SPLITTER_CTRL_REG);
}
- if (phy_dev && sgmii_adapter_base)
+ if ((priv->plat->phy_interface == PHY_INTERFACE_MODE_SGMII ||
+ priv->plat->phy_interface == PHY_INTERFACE_MODE_1000BASEX) &&
+ sgmii_adapter_base)
writew(SGMII_ADAPTER_ENABLE,
sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG);
}
@@ -256,6 +256,7 @@ static int socfpga_set_phy_mode_common(int phymode, u32 *val)
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_GMII:
case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_1000BASEX:
*val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII;
break;
case PHY_INTERFACE_MODE_RMII: