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| author |   Clément Léger <cleger@rivosinc.com> | 2023-11-14 09:12:54 -0500 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2023-12-12 15:45:15 -0800 |
| commit | fe987e84b0120e2b41db69ed4ede166797aa8d2e (patch) | |
| tree | 90553e83a8f5224beba6a4b2c4be0676879c26ef | |
| parent | dt-bindings: riscv: add Zvfh[min] ISA extension description (diff) | |
| download | wireguard-linux-fe987e84b0120e2b41db69ed4ede166797aa8d2e.tar.xz wireguard-linux-fe987e84b0120e2b41db69ed4ede166797aa8d2e.zip | |
riscv: add ISA extension parsing for Zfa
Add parsing for Zfa ISA extension [1] which were ratified in commit
056b6ff467c7 ("Zfa is ratified") of riscv-isa-manual[2].
Link: https://drive.google.com/file/d/1VT6QIggpb59-8QRV266dEE4T8FZTxGq4/view [1]
Link: https://github.com/riscv/riscv-isa-manual/commits/056b6ff467c7 [2]
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Evan Green <evan@rivosinc.com>
Link: https://lore.kernel.org/r/20231114141256.126749-19-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/riscv/include/asm/hwcap.h | 1 | ||||
| -rw-r--r-- | arch/riscv/kernel/cpufeature.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index 103d4f0aaf15..2438d4685da6 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -83,6 +83,7 @@ #define RISCV_ISA_EXT_ZIHINTNTL 68 #define RISCV_ISA_EXT_ZVFH 69 #define RISCV_ISA_EXT_ZVFHMIN 70 +#define RISCV_ISA_EXT_ZFA 71 #define RISCV_ISA_EXT_MAX 128 #define RISCV_ISA_EXT_INVALID U32_MAX diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 623a5fa48cf4..dc0ab3e97cd2 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -259,6 +259,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { __RISCV_ISA_EXT_DATA(zihintntl, RISCV_ISA_EXT_ZIHINTNTL), __RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE), __RISCV_ISA_EXT_DATA(zihpm, RISCV_ISA_EXT_ZIHPM), + __RISCV_ISA_EXT_DATA(zfa, RISCV_ISA_EXT_ZFA), __RISCV_ISA_EXT_DATA(zfh, RISCV_ISA_EXT_ZFH), __RISCV_ISA_EXT_DATA(zfhmin, RISCV_ISA_EXT_ZFHMIN), __RISCV_ISA_EXT_DATA(zba, RISCV_ISA_EXT_ZBA), |