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| author |   Kishon Vijay Abraham I <kishon@ti.com> | 2020-05-08 18:36:45 +0530 |
|---|---|---|
| committer |   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2020-05-18 15:52:34 +0100 |
| commit | 7fb39bf2a1de9dc9e0846a1e3fe74e959a693a0d (patch) | |
| tree | 09141e50dd6d158d7987954d76fccf5bd3546c42 | |
| parent | PCI: cadence: Remove "cdns,max-outbound-regions" DT property (diff) | |
| download | wireguard-linux-7fb39bf2a1de9dc9e0846a1e3fe74e959a693a0d.tar.xz wireguard-linux-7fb39bf2a1de9dc9e0846a1e3fe74e959a693a0d.zip | |
PCI: cadence: Fix to read 32-bit Vendor ID/Device ID property from DT
The PCI Bus Binding specification (IEEE Std 1275-1994 Revision 2.1 [1])
defines both Vendor ID and Device ID to be 32-bits. Fix
pcie-cadence-host.c driver to read 32-bit Vendor ID and Device ID
properties from device tree.
[1] -> https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf
Link: https://lore.kernel.org/r/20200508130646.23939-4-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Tom Joseph <tjoseph@cadence.com>
| -rw-r--r-- | drivers/pci/controller/cadence/pcie-cadence-host.c | 4 | ||||
| -rw-r--r-- | drivers/pci/controller/cadence/pcie-cadence.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pci/controller/cadence/pcie-cadence-host.c b/drivers/pci/controller/cadence/pcie-cadence-host.c index e5e9a3293579..8c2543f28ba0 100644 --- a/drivers/pci/controller/cadence/pcie-cadence-host.c +++ b/drivers/pci/controller/cadence/pcie-cadence-host.c @@ -220,10 +220,10 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc) of_property_read_u32(np, "cdns,no-bar-match-nbits", &rc->no_bar_nbits); rc->vendor_id = 0xffff; - of_property_read_u16(np, "vendor-id", &rc->vendor_id); + of_property_read_u32(np, "vendor-id", &rc->vendor_id); rc->device_id = 0xffff; - of_property_read_u16(np, "device-id", &rc->device_id); + of_property_read_u32(np, "device-id", &rc->device_id); res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "reg"); pcie->reg_base = devm_ioremap_resource(dev, res); diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h index 6bd89a21bb1c..df14ad002fe9 100644 --- a/drivers/pci/controller/cadence/pcie-cadence.h +++ b/drivers/pci/controller/cadence/pcie-cadence.h @@ -262,8 +262,8 @@ struct cdns_pcie_rc { struct resource *bus_range; void __iomem *cfg_base; u32 no_bar_nbits; - u16 vendor_id; - u16 device_id; + u32 vendor_id; + u32 device_id; }; /** |