diff options
| author |   Jagan Teki <jagan@edgeble.ai> | 2023-07-31 16:05:15 +0530 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2023-08-10 22:41:54 +0200 |
| commit | 012f90c31babdbd94f3e7bc80400f3d4ae5035bf (patch) | |
| tree | ef82597249840bad706042fe9f5c82e4724d3e45 | |
| parent | ARM: dts: rockchip: Add rv1126 uart5m2_xfer pins (diff) | |
| download | wireguard-linux-012f90c31babdbd94f3e7bc80400f3d4ae5035bf.tar.xz wireguard-linux-012f90c31babdbd94f3e7bc80400f3d4ae5035bf.zip | |
ARM: dts: rockchip: Drop EMMC_RSTN for edgeble-neu2
EMMC_RSTN GPIO1_A3 is connected to FSPI_CLK in Edgeble Neu2
board.
So, drop the same GPIO pin from eMMC.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20230731103518.2906147-11-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi index cc64ba4be344..e3e5752fd6b7 100644 --- a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi @@ -52,7 +52,7 @@ bus-width = <8>; non-removable; pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_rstnout>; + pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk>; rockchip,default-sample-phase = <90>; vmmc-supply = <&vcc_3v3>; vqmmc-supply = <&vccio_flash>; |