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authorAndrea della Porta <andrea.porta@suse.com>2025-03-19 22:52:24 +0100
committerBjorn Helgaas <bhelgaas@google.com>2025-03-24 15:15:03 -0500
commit01a1e9d6a0077d17e737fbc0681d567dbdb3029e (patch)
treea9856e6145a4efabda1ed6aaf110a0de53e68ce4
parentdt-bindings: PCI: fsl,layerscape-pcie-ep: Drop unnecessary status from example (diff)
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dt-bindings: PCI: Add common schema for devices accessible through PCI BARs
Common YAML schema for devices that exports internal peripherals through PCI BARs. The BARs are exposed as simple-buses through which the peripherals can be accessed. This is not intended to be used as a standalone binding, but should be included by device specific bindings. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Krzysztof WilczyƄski <kwilczynski@kernel.org> [bhelgaas: fix typo] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/096ab7addb39e498e28ac2526c07157cc9327c42.1742418429.git.andrea.porta@suse.com
-rw-r--r--Documentation/devicetree/bindings/pci/pci-ep-bus.yaml58
1 files changed, 58 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml
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+++ b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/pci-ep-bus.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Common Properties for PCI MFD EP with Peripherals Addressable from BARs
+
+maintainers:
+ - A. della Porta <andrea.porta@suse.com>
+
+description:
+ Define a generic node representing a PCI endpoint which contains several sub-
+ peripherals. The peripherals can be accessed through one or more BARs.
+ This common schema is intended to be referenced from device tree bindings and
+ does not represent a device tree binding by itself.
+
+properties:
+ '#address-cells':
+ const: 3
+
+ '#size-cells':
+ const: 2
+
+ ranges:
+ minItems: 1
+ maxItems: 6
+ items:
+ maxItems: 8
+ additionalItems: true
+ items:
+ - maximum: 5 # The BAR number
+ - const: 0
+ - const: 0
+
+patternProperties:
+ '^pci-ep-bus@[0-5]$':
+ type: object
+ description:
+ One node for each BAR used by peripherals contained in the PCI endpoint.
+ Each node represents a bus on which peripherals are connected.
+ This allows for some segmentation, e.g., one peripheral is accessible
+ through BAR0 and another through BAR1, and you don't want the two
+ peripherals to be able to act on the other BAR. Alternatively, when
+ different peripherals need to share BARs, you can define only one node
+ and use a 'ranges' property to map all the used BARs.
+
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: simple-bus
+
+ required:
+ - compatible
+
+additionalProperties: true
+...