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authorLiu Ying <gnuiyl@gmail.com>2016-07-08 17:40:53 +0800
committerPhilipp Zabel <p.zabel@pengutronix.de>2016-07-12 18:23:38 +0200
commit08a8901882709c6fb9e6158d57f59c1d16eb45cd (patch)
tree3cf6bb569d32cfc47f85d793a9e05a73dc3c5684
parentMerge tag 'topic/drm-misc-2016-06-22-updated' of git://anongit.freedesktop.org/drm-intel into drm-next (diff)
downloadwireguard-linux-08a8901882709c6fb9e6158d57f59c1d16eb45cd.tar.xz
wireguard-linux-08a8901882709c6fb9e6158d57f59c1d16eb45cd.zip
drm/imx: ipuv3 plane: Check different types of plane separately
The IPUv3 primary plane doesn't support partial off screen. So, this patch separates plane check logics for primary plane and overlay plane and adds more limitations on the primary plane. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
-rw-r--r--drivers/gpu/drm/imx/ipuv3-plane.c67
1 files changed, 38 insertions, 29 deletions
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index a4bb44118d33..cd7eb2658757 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -199,37 +199,46 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc,
if (src_w != crtc_w || src_h != crtc_h)
return -EINVAL;
- /* clip to crtc bounds */
- if (crtc_x < 0) {
- if (-crtc_x > crtc_w)
+ if (ipu_plane->base.type == DRM_PLANE_TYPE_PRIMARY) {
+ /* full plane doesn't support partial off screen */
+ if (crtc_x || crtc_y || crtc_w != mode->hdisplay ||
+ crtc_h != mode->vdisplay)
return -EINVAL;
- src_x += -crtc_x;
- src_w -= -crtc_x;
- crtc_w -= -crtc_x;
- crtc_x = 0;
- }
- if (crtc_y < 0) {
- if (-crtc_y > crtc_h)
- return -EINVAL;
- src_y += -crtc_y;
- src_h -= -crtc_y;
- crtc_h -= -crtc_y;
- crtc_y = 0;
- }
- if (crtc_x + crtc_w > mode->hdisplay) {
- if (crtc_x > mode->hdisplay)
- return -EINVAL;
- crtc_w = mode->hdisplay - crtc_x;
- src_w = crtc_w;
- }
- if (crtc_y + crtc_h > mode->vdisplay) {
- if (crtc_y > mode->vdisplay)
+
+ /* full plane minimum width is 13 pixels */
+ if (crtc_w < 13)
return -EINVAL;
- crtc_h = mode->vdisplay - crtc_y;
- src_h = crtc_h;
- }
- /* full plane minimum width is 13 pixels */
- if (crtc_w < 13 && (ipu_plane->dp_flow != IPU_DP_FLOW_SYNC_FG))
+ } else if (ipu_plane->base.type == DRM_PLANE_TYPE_OVERLAY) {
+ /* clip to crtc bounds */
+ if (crtc_x < 0) {
+ if (-crtc_x > crtc_w)
+ return -EINVAL;
+ src_x += -crtc_x;
+ src_w -= -crtc_x;
+ crtc_w -= -crtc_x;
+ crtc_x = 0;
+ }
+ if (crtc_y < 0) {
+ if (-crtc_y > crtc_h)
+ return -EINVAL;
+ src_y += -crtc_y;
+ src_h -= -crtc_y;
+ crtc_h -= -crtc_y;
+ crtc_y = 0;
+ }
+ if (crtc_x + crtc_w > mode->hdisplay) {
+ if (crtc_x > mode->hdisplay)
+ return -EINVAL;
+ crtc_w = mode->hdisplay - crtc_x;
+ src_w = crtc_w;
+ }
+ if (crtc_y + crtc_h > mode->vdisplay) {
+ if (crtc_y > mode->vdisplay)
+ return -EINVAL;
+ crtc_h = mode->vdisplay - crtc_y;
+ src_h = crtc_h;
+ }
+ } else
return -EINVAL;
if (crtc_h < 2)
return -EINVAL;