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author | 2024-09-30 19:08:47 +0200 | |
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committer | 2024-12-09 17:19:55 +0100 | |
commit | 0df076d35c58bfec06803d317251b0ffc3c039a9 (patch) | |
tree | 59732715fa9934279e6b7195384825b2decf5bd3 | |
parent | arm64: dts: st: Add combophy node on stm32mp251 (diff) | |
download | wireguard-linux-0df076d35c58bfec06803d317251b0ffc3c039a9.tar.xz wireguard-linux-0df076d35c58bfec06803d317251b0ffc3c039a9.zip |
arm64: dts: st: Enable COMBOPHY on the stm32mp257f-ev1 board
Enable the COMBOPHY with external pad clock on stm32mp257f-ev1
board, to be used for the PCIe clock provider.
Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
-rw-r--r-- | arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index 6f393b082789..753df49dbcb5 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -27,6 +27,14 @@ stdout-path = "serial0:115200n8"; }; + clocks { + pad_clk: pad-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + }; + }; + memory@80000000 { device_type = "memory"; reg = <0x0 0x80000000 0x1 0x0>; @@ -50,6 +58,12 @@ status = "okay"; }; +&combophy { + clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>, <&pad_clk>; + clock-names = "apb", "ker", "pad"; + status = "okay"; +}; + ðernet2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <ð2_rgmii_pins_a>; |