diff options
| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-07-14 18:26:23 +0300 |
|---|---|---|
| committer |   Rodrigo Vivi <rodrigo.vivi@intel.com> | 2020-08-17 16:15:32 -0400 |
| commit | 124c7088b87fdf97530fe96d7c025fce9198ed9c (patch) | |
| tree | 763e9d0d6430f70094a31ad90b3855d5b149f4ec | |
| parent | drm/i915/fbc: Limit cfb to the first 256MiB of stolen on g4x+ (diff) | |
| download | wireguard-linux-124c7088b87fdf97530fe96d7c025fce9198ed9c.tar.xz wireguard-linux-124c7088b87fdf97530fe96d7c025fce9198ed9c.zip | |
drm/i915: Pack struct intel_cdclk_vals
There's a pointless hole in struct intel_cdclk_vals, get rid of it.
Fortunately we already use named initializers so the order does not
matter.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200714152626.380-1-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_cdclk.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h index 5731806e4cee..6b31fde4be16 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.h +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h @@ -17,8 +17,8 @@ struct intel_atomic_state; struct intel_crtc_state; struct intel_cdclk_vals { - u16 refclk; u32 cdclk; + u16 refclk; u8 divider; /* CD2X divider * 2 */ u8 ratio; }; |