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| author |   Alex Bee <knaerzche@gmail.com> | 2024-05-09 16:06:48 +0200 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2024-05-28 16:19:32 +0200 |
| commit | 14a1d1dc35d346a1523f38f6517c349dfa447a58 (patch) | |
| tree | 5d2558a45e521f8cd76f3cb436c167884fc5c025 | |
| parent | Linux 6.10-rc1 (diff) | |
| download | wireguard-linux-14a1d1dc35d346a1523f38f6517c349dfa447a58.tar.xz wireguard-linux-14a1d1dc35d346a1523f38f6517c349dfa447a58.zip | |
dt-bindings: clock: rk3128: Add PCLK_MIPIPHY
The DPHY's APB clock is required to be exposed in order to be able to
enable it and access the phy's registers.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240509140653.168591-3-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | include/dt-bindings/clock/rk3128-cru.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h index 6a47825dac5d..1be455ba4985 100644 --- a/include/dt-bindings/clock/rk3128-cru.h +++ b/include/dt-bindings/clock/rk3128-cru.h @@ -116,6 +116,7 @@ #define PCLK_GMAC 367 #define PCLK_PMU_PRE 368 #define PCLK_SIM_CARD 369 +#define PCLK_MIPIPHY 370 /* hclk gates */ #define HCLK_SPDIF 440 |