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| author |   Peter Griffin <peter.griffin@linaro.org> | 2025-01-06 14:57:46 +0000 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-02-04 09:42:47 +0100 |
| commit | 168e24966f10ff635b0ec9728aa71833bf850ee5 (patch) | |
| tree | 468eb510575c7e35ef1f2c00664f4d51ae36ecc7 | |
| parent | Linux 6.14-rc1 (diff) | |
| download | wireguard-linux-168e24966f10ff635b0ec9728aa71833bf850ee5.tar.xz wireguard-linux-168e24966f10ff635b0ec9728aa71833bf850ee5.zip | |
arm64: dts: exynos: gs101: disable pinctrl_gsacore node
gsacore registers are not accessible from normal world.
Disable this node, so that the suspend/resume callbacks
in the pinctrl driver don't cause a Serror attempting to
access the registers.
Fixes: ea89fdf24fd9 ("arm64: dts: exynos: google: Add initial Google gs101 SoC support")
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Alim Akhtar <alim.akhtar@samsung.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: tudor.ambarus@linaro.org
Cc: andre.draszik@linaro.org
Cc: kernel-team@android.com
Cc: willmcvicker@google.com
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20250106-contrib-pg-pinctrl_gsacore_disable-v1-1-d3fc88a48aed@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/exynos/google/gs101.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index c5335dd59dfe..813f96089578 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1454,6 +1454,7 @@ /* TODO: update once support for this CMU exists */ clocks = <0>; clock-names = "pclk"; + status = "disabled"; }; cmu_top: clock-controller@1e080000 { |