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| author |   Michal Simek <michal.simek@amd.com> | 2024-12-11 13:41:27 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2025-02-03 17:05:50 +0100 |
| commit | 170166982142f4f5ffa392a80cb130f5a423874e (patch) | |
| tree | a3bfb8fede753b9be8075a909f13fc3f93d1ffc8 | |
| parent | ARM: zynq: Wire smcc with nand/nor memories on zc770 platform (diff) | |
| download | wireguard-linux-170166982142f4f5ffa392a80cb130f5a423874e.tar.xz wireguard-linux-170166982142f4f5ffa392a80cb130f5a423874e.zip | |
ARM: zynq: Define u-boot bootscrip addr via DT
Define bootscript address in RAM via DT property. Adding default value to
common DTSI. Platform DT description can remove this property or rewrite
it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9252bb464c5c82fda6018ea450c6f453a5d8412c.1733920873.git.michal.simek@amd.com
| -rw-r--r-- | arch/arm/boot/dts/xilinx/zynq-7000.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/xilinx/zynq-7000.dtsi b/arch/arm/boot/dts/xilinx/zynq-7000.dtsi index 82741c837e43..8a6bc3c4cadc 100644 --- a/arch/arm/boot/dts/xilinx/zynq-7000.dtsi +++ b/arch/arm/boot/dts/xilinx/zynq-7000.dtsi @@ -8,6 +8,13 @@ #size-cells = <1>; compatible = "xlnx,zynq-7000"; + options { + u-boot { + compatible = "u-boot,config"; + bootscr-address = /bits/ 64 <0x3000000>; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; |