diff options
| author |   Simon Xue <xxm@rock-chips.com> | 2025-02-27 19:03:43 +0800 |
|---|---|---|
| committer |   Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2025-03-04 15:03:03 +0000 |
| commit | 1e30116da036b8c5969c6461b344fb1ee71edcf0 (patch) | |
| tree | ce1828de3963048b9e71a527c4c5fe2dea9dc19d | |
| parent | dt-bindings: iio: adc: Add rockchip,rk3562-saradc string (diff) | |
| download | wireguard-linux-1e30116da036b8c5969c6461b344fb1ee71edcf0.tar.xz wireguard-linux-1e30116da036b8c5969c6461b344fb1ee71edcf0.zip | |
iio: adc: rockchip_saradc: add rk3562
rk3562 is using v2 saradc with 8 channels.
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Link: https://patch.msgid.link/20250227110343.2342017-2-kever.yang@rock-chips.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
| -rw-r--r-- | drivers/iio/adc/rockchip_saradc.c | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 2619547d5d6f..9a099df79518 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later /* * Rockchip Successive Approximation Register (SAR) A/D Converter - * Copyright (C) 2014 ROCKCHIP, Inc. + * Copyright (C) 2014 Rockchip Electronics Co., Ltd. */ #include <linux/bitfield.h> @@ -290,6 +290,25 @@ static const struct rockchip_saradc_data rk3528_saradc_data = { .read = rockchip_saradc_read_v2, }; +static const struct iio_chan_spec rockchip_rk3562_saradc_iio_channels[] = { + SARADC_CHANNEL(0, "adc0", 10), + SARADC_CHANNEL(1, "adc1", 10), + SARADC_CHANNEL(2, "adc2", 10), + SARADC_CHANNEL(3, "adc3", 10), + SARADC_CHANNEL(4, "adc4", 10), + SARADC_CHANNEL(5, "adc5", 10), + SARADC_CHANNEL(6, "adc6", 10), + SARADC_CHANNEL(7, "adc7", 10), +}; + +static const struct rockchip_saradc_data rk3562_saradc_data = { + .channels = rockchip_rk3562_saradc_iio_channels, + .num_channels = ARRAY_SIZE(rockchip_rk3562_saradc_iio_channels), + .clk_rate = 1000000, + .start = rockchip_saradc_start_v2, + .read = rockchip_saradc_read_v2, +}; + static const struct iio_chan_spec rockchip_rk3568_saradc_iio_channels[] = { SARADC_CHANNEL(0, "adc0", 10), SARADC_CHANNEL(1, "adc1", 10), @@ -343,6 +362,9 @@ static const struct of_device_id rockchip_saradc_match[] = { .compatible = "rockchip,rk3528-saradc", .data = &rk3528_saradc_data, }, { + .compatible = "rockchip,rk3562-saradc", + .data = &rk3562_saradc_data, + }, { .compatible = "rockchip,rk3568-saradc", .data = &rk3568_saradc_data, }, { |