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authorWesley Chalmers <Wesley.Chalmers@amd.com>2023-03-03 14:44:53 -0500
committerAlex Deucher <alexander.deucher@amd.com>2023-03-22 00:58:56 -0400
commit28e5c9d601fb8c2f387516b095a9cf6ddf7c00d5 (patch)
tree77becb057a23b15183a41ce89d174ee74d188172
parentdrm/amdgpu: resume ras for gfx v11_0_3 during reset on SRIOV (diff)
downloadwireguard-linux-28e5c9d601fb8c2f387516b095a9cf6ddf7c00d5.tar.xz
wireguard-linux-28e5c9d601fb8c2f387516b095a9cf6ddf7c00d5.zip
drm/amd/display: Make DCN32 3dlut function available to future DCNs
[Why & How] Make DCN32 3dlut function non-static and thus available for future DCNs. Reviewed-by: Chris Park <Chris.Park@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c2
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h3
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
index 5016b1313f3d..42255c22605d 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
@@ -414,7 +414,7 @@ void dcn32_subvp_pipe_control_lock(struct dc *dc,
}
-static bool dcn32_set_mpc_shaper_3dlut(
+bool dcn32_set_mpc_shaper_3dlut(
struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream)
{
struct dpp *dpp_base = pipe_ctx->plane_res.dpp;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h
index 84c1f36c3fa6..2a5376eb9d66 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h
@@ -54,6 +54,9 @@ bool dcn32_set_input_transfer_func(struct dc *dc,
struct pipe_ctx *pipe_ctx,
const struct dc_plane_state *plane_state);
+bool dcn32_set_mpc_shaper_3dlut(
+ struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream);
+
bool dcn32_set_output_transfer_func(struct dc *dc,
struct pipe_ctx *pipe_ctx,
const struct dc_stream_state *stream);