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| author |   Jasdeep Dhillon <jasdeep.dhillon@amd.com> | 2023-02-28 11:46:31 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2023-04-21 08:50:20 -0400 |
| commit | 2c30f85551211a48f7be57499a6fcb4ad00875da (patch) | |
| tree | 877f750597dd7d23eb9303e2e48364681ab9e128 | |
| parent | drm/amd/display: Add check for PState change in DCN32 (diff) | |
| download | wireguard-linux-2c30f85551211a48f7be57499a6fcb4ad00875da.tar.xz wireguard-linux-2c30f85551211a48f7be57499a6fcb4ad00875da.zip | |
drm/amd/display: Isolate remaining FPU code in DCN32
[Why]
DCN32 resource contains code that uses FPU.
[How]
Moved code into DCN32 FPU
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Jasdeep Dhillon <jasdeep.dhillon@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h | 2 |
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c index 2f7723053042..b8a2518faecc 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c @@ -2881,3 +2881,9 @@ bool dcn32_find_vactive_pipe(struct dc *dc, const struct dc_state *context, uint } return vactive_found; } + +void dcn32_set_clock_limits(const struct _vcs_dpi_soc_bounding_box_st *soc_bb) +{ + dc_assert_fp_enabled(); + dcn3_2_soc.clock_limits[0].dcfclk_mhz = 1200.0; +} diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h index 9a0806a0e2ef..dcf512cd3072 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h @@ -80,4 +80,6 @@ void dcn32_assign_fpo_vactive_candidate(struct dc *dc, const struct dc_state *co bool dcn32_find_vactive_pipe(struct dc *dc, const struct dc_state *context, uint32_t vactive_margin_req); +void dcn32_set_clock_limits(const struct _vcs_dpi_soc_bounding_box_st *soc_bb); + #endif |