diff options
| author |   Ilya <Ilya.Bakoulin@amd.com> | 2022-01-27 14:14:32 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-02-07 18:03:49 -0500 |
| commit | 39da460fd4c0f8e7290dcc9cbfc9375de9d0eeca (patch) | |
| tree | 7e68da2285094e0d5e67c6c774c7599d85ec5d4f | |
| parent | drm/amd/display: keep eDP Vdd on when eDP stream is already enabled (diff) | |
| download | wireguard-linux-39da460fd4c0f8e7290dcc9cbfc9375de9d0eeca.tar.xz wireguard-linux-39da460fd4c0f8e7290dcc9cbfc9375de9d0eeca.zip | |
drm/amd/display: Fix DP LT sequence on EQ fail
[Why]
The number of lanes wasn't being reset to maximum when reducing link
rate due to an EQ failure. This could result in having fewer lanes in
the verified link capabilities, a lower maximum link bandwidth, and
fewer modes being supported.
[How]
Reset the number of lanes to max when dropping link rate due to EQ
failure during link training.
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Ilya <Ilya.Bakoulin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c index d0cb40df60a4..cd9c31b5e55d 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c @@ -3504,6 +3504,7 @@ static bool decide_fallback_link_setting( current_link_setting->link_rate = reduce_link_rate( current_link_setting->link_rate); + current_link_setting->lane_count = initial_link_settings.lane_count; } else { return false; } @@ -3516,6 +3517,7 @@ static bool decide_fallback_link_setting( current_link_setting->link_rate = reduce_link_rate( current_link_setting->link_rate); + current_link_setting->lane_count = initial_link_settings.lane_count; } else { return false; } |