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| author |   Gilles Talis <gilles.talis@gmail.com> | 2024-10-27 18:54:08 -0400 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2024-11-04 16:46:32 +0800 |
| commit | 443a2c45389c1d7cd1ec71b3153c2c5e7affe050 (patch) | |
| tree | 3a7a2ffd8088d29c59d7272386e88135753960dd | |
| parent | arm64: dts: imx8qm-ss-hsio: fix PCI and SATA clock indices (diff) | |
| download | wireguard-linux-443a2c45389c1d7cd1ec71b3153c2c5e7affe050.tar.xz wireguard-linux-443a2c45389c1d7cd1ec71b3153c2c5e7affe050.zip | |
arm64: dts: imx8mp-navqp: Add HDMI support
The HDMI connector on the board is a micro-HDMI (type "d")
Signed-off-by: Gilles Talis <gilles.talis@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-navqp.dts | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts b/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts index 5fd1614982cd..4a4f7c1adc23 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts @@ -18,6 +18,18 @@ stdout-path = &uart2; }; + hdmi-connector { + compatible = "hdmi-connector"; + label = "J15"; + type = "d"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_out>; + }; + }; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -85,6 +97,28 @@ }; }; +&hdmi_pvi { + status = "okay"; +}; + +&hdmi_tx { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmi>; + status = "okay"; + + ports { + port@1 { + hdmi_tx_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; +}; + +&hdmi_tx_phy { + status = "okay"; +}; + &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; @@ -213,6 +247,10 @@ }; }; +&lcdif3 { + status = "okay"; +}; + &uart2 { /* console */ pinctrl-names = "default"; @@ -279,6 +317,15 @@ >; }; + pinctrl_hdmi: hdmigrp { + fsl,pins = < + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c2 + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c2 + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x10 + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x10 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3 |