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authorSander Vanheule <sander@svanheule.net>2025-01-19 19:34:22 +0100
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2025-02-21 15:10:17 +0100
commit4b7785dd43b8eeae3534da4a13922a361eace8ff (patch)
treefead70f21c2c3bae28f55827c38b6f2ba88ac471
parentmips: dts: realtek: Correct uart interrupt-parent (diff)
downloadwireguard-linux-4b7785dd43b8eeae3534da4a13922a361eace8ff.tar.xz
wireguard-linux-4b7785dd43b8eeae3534da4a13922a361eace8ff.zip
mips: dts: realtek: Replace uart clock property
Add a fixed clock to define the clock frequency of the Lexra bus and use this for the two uart nodes instead of a separate clock-frequency property. Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-rw-r--r--arch/mips/boot/dts/realtek/rtl838x.dtsi10
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/mips/boot/dts/realtek/rtl838x.dtsi b/arch/mips/boot/dts/realtek/rtl838x.dtsi
index e3183a71765e..246f4f607128 100644
--- a/arch/mips/boot/dts/realtek/rtl838x.dtsi
+++ b/arch/mips/boot/dts/realtek/rtl838x.dtsi
@@ -34,6 +34,12 @@
interrupt-controller;
};
+ lx_clk: clock-lexra {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+
soc@18000000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -44,7 +50,7 @@
compatible = "ns16550a";
reg = <0x2000 0x100>;
- clock-frequency = <200000000>;
+ clocks = <&lx_clk>;
interrupt-parent = <&intc>;
interrupts = <31>;
@@ -61,7 +67,7 @@
compatible = "ns16550a";
reg = <0x2100 0x100>;
- clock-frequency = <200000000>;
+ clocks = <&lx_clk>;
interrupt-parent = <&intc>;
interrupts = <30>;