diff options
| author |   Michael Walle <michael@walle.cc> | 2022-05-03 00:41:25 +0200 |
|---|---|---|
| committer |   Claudiu Beznea <claudiu.beznea@microchip.com> | 2022-05-13 16:42:27 +0300 |
| commit | 4d2a87042e9fed35b5bf5d92d1955a197697aa6f (patch) | |
| tree | ea2d1ac84116b54a9eb039bd75ed636f1a9fd9f8 | |
| parent | ARM: dts: lan966x: add reset switch reset node (diff) | |
| download | wireguard-linux-4d2a87042e9fed35b5bf5d92d1955a197697aa6f.tar.xz wireguard-linux-4d2a87042e9fed35b5bf5d92d1955a197697aa6f.zip | |
ARM: dts: lan966x: add serdes node
Add the SerDes node. On the LAN966x SoC these SerDes are used to connect
network PHYs.
By default, that node is disabled.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-12-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
| -rw-r--r-- | arch/arm/boot/dts/lan966x.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 238b4dfccaa2..92f9e2835fad 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -500,6 +500,14 @@ clocks = <&sys_clk>; }; + serdes: serdes@e202c000 { + compatible = "microchip,lan966x-serdes"; + reg = <0xe202c000 0x9c>, + <0xe2004010 0x4>; + #phy-cells = <2>; + status = "disabled"; + }; + gic: interrupt-controller@e8c11000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; #interrupt-cells = <3>; |